130V Max Offset voltage Op Amp in TSOT23 Features: Low Offset Voltage: 130μV max Input Offset Drift: 1.5 µV/°C Max Supply Current: 1.1mA/amp Small 5-lead TSOT23 package Dual Supply Operation: ±5V to ±15V

Dual-Channel, 5 kV Isolators with Integrated DC/DC Converter (1/1 channel directionality) Features: isoPower integrated, isolated DC/DC converter Regulated 5 V or 3.3 V output Up to 400 mW output power Dual dc-to-25 Mbps (NRZ) signal isolation channels 16-lead SOIC package with 7.6 mm creepage High temperature operation: 105°C maximum High common-mode transient immunity: >25 kV/μs Safety and regulatory approvals UL recognition (pending) 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice #5A IEC 60601-1: 125 V rms See datasheet for additional features

Microphone Preamplifiers MICROPHONE PREAMP W/VAR COMPRESS

RS-232 Interface IC 200KB/S 0.1UF W/SHTDWN&EN

Switching Voltage Regulators 4A Boost 1.3MHz

Analog to Digital Converters - ADC 4 CH. 10-BIT ADC I.C.

Voltage References Low Cost 4.096V Shunt Voltage Reference

Mems Accelerometer, Analogue, X/Y/Z Axis Rohs Compliant: Yes |Analog Devices ADXL358CCCZ

The AD9550 is a phase-locked loop (PLL) based clock translatordesigned to address the needs of wireline communicationand base station applications. The device employs an integer-NPLL to accommodate the applicable frequency translationrequirements. It accepts a single-ended input reference signalat the REF input.The AD9550 is pin programmable, providing a matrix ofstandard input/output frequency translations from a list of15 possible input frequencies to a list of 51 possible outputfrequency pairs (OUT1 and OUT2).The AD9550 output is compatible with LVPECL, LVDS, orsingle-ended CMOS logic levels, although the AD9550 isimplemented in a strictly CMOS process.The AD9550 operates over the extended industrial temperaturerange of −40°C to +85°C.APPLICATIONS Cost effective replacement of high frequency VCXO, OCXO, and SAW resonators Flexible frequency translation for wireline applications such as Ethernet, T1/E1, SONET/SDH, GPON, xDSL Wireless infrastructure Test and measurement (including handheld devices)

The AD9553 is a phase-locked loop (PLL) based clock translator designed to address the needs of passive optical networks (PON) and base stations. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. The user supplies up to two single-ended input reference signals or one differential input reference signal via the REFA and REFB inputs. The device supports holdover applications by allowing the user to connect a 25 MHz crystal resonator to the XTAL input.The AD9553 is pin programmable, providing a matrix of standard input/output frequency translations from a list of 15 possible input frequencies to a list of 52 possible output frequency pairs (OUT1 and OUT2). The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency translations.The AD9553 output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9553 is implemented in a strictly CMOS process.The AD9553 operates over the extended industrial temperature range of −40°C to +85°C.APPLICATIONS Cost effective replacement of high frequency VCXO, OCXO, and SAW resonators Extremely flexible frequency translation for SONET/SDH, Ethernet, Fibre Channel, DRFI/DOCSIS, and PON/EPON/GPON Wireless infrastructure Test and measurement (including handheld devices)