Ultracompact, 3 A Thermoelectric Cooler (TEC) Controller Features: High efficiency single inductor architecture Integrated low RDSON MOSFETs for the TEC controller TEC voltage and current operation monitoring No external sense resistor required Independent TEC heating and cooling current-limit settings 2.0 MHz (typical) PWM driver switching frequency External synchronization Programmable maximum TEC voltage Two integrated, zero-drift, rail-to-rail chopper amplifiers Compatible with NTC or RTD thermal sensors 2.50 V reference output with 1% accuracy Temperature lock indicator Available in a 36-lead, 6 mm × 6 mm LFCSP

LC2MOS Quad SPST Switch Features: 44 V Supply Maximum Ratings VSS to VDD Analog Signal Range Low On-Resistance (< 70 Ω) Low ΔRON ( 9 Ω max) Low ΔRON Match ( 3 Ω max) Low Power Dissipation Fast Switching Times ton < 110 ns toff < 60 ns Low Leakage Current (3 nA max) Low Charge Injection (6 pC max) Break-Before-Make Switching Action

Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with 10 V Inputs Features:24-bit ADC with integrated AFEFast and flexible output rate: 2.5 SPS to 125 kSPSChannel scan data rate of 24,845 SPS per channel (40.25 s settling)85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel10 V inputs, either 8 differential or 16 single-endedVIN pin absolute maximum rating 65 VAbsolute input pin voltage up to 20 VMinimum 1 M impedanceOn-chip 2.5 V reference0.12% initial accuracy at 25C, 5 ppm/C (typical) driftInternal or external clockPower suppliesAVDD = 4.5 V to 5.5 VIOVDD = 2 V to 5.5 VTotal current consumption AVDD + IOVDD (IDD) = 10.4 mATemperature range: 40C to +105C3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)SPI, QSPI, MICROWIRE, and DSP compatible

32 A, Ultra Low Power, 24-Bit Sigma-Delta ADC with Integrated PGA and FIFO Features: Ultralow current consumption (typical): 32 μA: continuous conversion mode (gain = 128) 5 μA: duty cycling mode (ratio = 1/16) 0.5 μA: standby mode 0.1 μA: power-down mode Built-in features for system level power savings: Current saving duty cycle ratio: 1/4 or 1/16 Smart sequencer and per channel configuration minimizes host processor load Deep embedded FIFO minimizes host processor load (depth of 256 samples) Autonomous FIFO interrupt functionality, threshold detection Single supply as low as 1.71 V increasing battery length RMS noise: 25 nV rms at 1.17 SPS (gain = 128) – 48 nV/√Hz Up to 22 noise free bits (gain = 1) Output data rate: 1.17 SPS to 2.4 kSPS Operates from 1.71 V to 3.6 V single supply or ±1.8 V split supplies Band gap reference with 15 ppm/°C maximum drift PGA with rail-to-rail analog input Adaptable sensor interfacing functionality: Matched programmable excitation currents for RTDs On-chip bias voltage generator for thermocouples Low-side power switch for bridge transducers Sensor open wire detection Internal temperature sensor and oscillator Self and system calibration Flexible filter options Simultaneous 50 Hz/60 Hz rejection (on selected filter options) General-purpose outputs Diagnostic functionality Crosspoint multiplexed inputs 8 differential/16 pseudo differential inputs 5 MHz SPI (3-wire or 4-wire) Available in 35-ball, 2.74 mm × 3.6 mm WLCSP Temperature range: −40°C to +105°C

Quad, Low Power, 12-Bit, 180 MSPS, Digital-to-Analog Converter and Waveform Generator Features: Highly integrated quad DAC On-chip 4096 × 12-bit pattern memory On-chip DDS Power dissipation at 3.3 V, 4 mA output typical 315.25 mW at 180 MSPS Power-down mode: <5 mW at 3.3 V Supply voltage: 1.8 V to 3.3 V SFDR to Nyquist: 86 dBc at 10 MHz output Phase noise at 1 kHz offset, 180 MSPS, 4 mA: −140 dBc/Hz Differential full-scale current outputs: 8 mA maximum at 3.3 V Small footprint, 5 mm × 5 mm with 3.5 mm × 3.6 mm exposed paddle, 32-lead LFCSP RoHS compliant package

Low Cost, High Speed, Rail-to-Rail Amplifier Features: High speed and fast settling on 5 V 110 MHz, −3 dB bandwidth (G = +1) (AD8051/AD8052) 150 MHz, −3 dB bandwidth (G = +1) (AD8054) 145 V/μs slew rate 50 ns settling time to 0.1% Single-supply operation Output swings to within 25 mV of either rail Input voltage range: −0.2 V to +4 V; VS = 5 V Video specifications (G = +2) 0.1 dB gain flatness: 20 MHz; RL = 150 Ω Differential gain/phase: 0.03%/0.03° Low distortion −80 dBc total harmonic @ 1 MHz, RL = 100 Ω Outstanding load drive capability Drives 45 mA, 0.5 V from supply rails (AD8051/AD8052) Drives 50 pF capacitive load (G = +1) (AD8051/AD8052) Low power: 2.75 mA/amplifier (AD8054) Low power: 4.4 mA/amplifier (AD8051/AD8052)

16-Bit, Isolated Sigma-Delta Modulator Features: 5 MHz to 20 MHz external clock input rate 16 bits, no missing codes Signal to noise ratio (SNR): 88 dB (typical) Effective number of bits (ENOB): 14.2 bits typical Typical offset drift vs. temperature: 1.6 μV/°C typical On-board digital isolator On-board reference See data sheet for additional featuresAD7403-EP supports defense and aerospace applications (AQEC standard) Download AD7403-EP data sheet Military temperature range: −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/16625 DSCC Drawing Number

Rheostats 1024tap 5v 50tp, 1% R-tol MSOP 12C I.C.

DA CONVERTOR;

DA CONVERTOR;