The ADL5501 is a mean-responding power detector for use in high frequency receiver and transmitter signal chains from 50 MHz to 6 GHz. It is easy to apply, requiring only a single supply between 2.7 V and 5.5 V and a power supply decoupling capacitor. The input is internally ac-coupled and has a nominal input impedance of 50 ?. The output is a linear-responding dc voltage with a conversion gain of 6.3 V/V rms at 900 MHz.The ADL5501 is intended for true power measurement of simple and complex waveforms. The device is particularly useful for measuring high crest factor (high peak-to-rms ratio) signals, such as CDMA-, CDMA2000-, W-CDMA-, and QPSK-/QAM-based OFDM waveforms. The on-chip modulation filter provides adequate averaging for most waveforms.The on-chip, 100 ? series resistance at the output, combined with an external shunt capacitor, creates a low-pass filter response that reduces the residual ripple in the dc output voltage. For more complex waveforms, an external capacitor at the FLTR pin can be used for supplementary signal demodulation.The ADL5501 offers excellent temperature stability across a 30 dB range and near 0 dB measurement error across temperature over the top portion of the dynamic range. In addition to its temperature stability, the ADL5501 offers low process variations that further reduce calibration complexity.The ADL5501 operates from ?40?C to +85?C and is available in a small 6-lead SC-70 package. It is fabricated on a proprietary high fT silicon bipolar process.ApplicationsMeasurement of CDMA-, CDMA2000-, W-CDMA-, and QPSK-/ QAM-based OFDM, and other complex modulationwaveforms RF transmitter or receiver power measurement

The ADL5545 is a single-ended RF/IF gain block amplifier that provides broadband operation from 30 MHz to 6 GHz. The ADL5545 provides over 36 dBm of OIP3 using only 56 mA from a 5 V supply.The ADL5545 provides a gain of 24 dB, which is stable over frequency, temperature, power supply, and from device to device. The amplifier is offered in the industry-standard SOT-89 package and is internally matched to 50 ? at the input and output, making the ADL5545 very easy to implement in a wide variety of applications. The only external components required are the input/output ac coupling capacitors, power supply decoupling capacitors, and dc bias inductor.The ADL5545 is fabricated on an InGaP HBT process and has a high ESD rating of ?1.5 kV (Class 1C). The ADL5545 is also fully specified for operation across the wide temperature range of ?40?C to +105?C. A fully populated RoHS-compliant evaluation board is available.

The ADL5920 is an ultrawideband, bidirectional detector that simultaneously measures forward and reverse rms power levels in a signal path, along with the return loss.The forward and reverse power traveling through the integrated bidirectional bridge is measured using two 50 dB linear in dB rms detectors. The detector output voltages, available at the VRMSF and VRMSR pins, are proportional to the forward and reflected power in dBm. A third, differential, output produces a voltage proportional to the return loss (reflection coefficient) in dB, closely related to the voltage standing wave ratio (VSWR). The common-mode level of this output is externally adjustable through the VOCM pin.The primary transmission line of the bidirectional bridge, from RFIN to RFOUT (or vice versa) is dc-coupled and allows small amounts of dc bias current through the bridge. When dc-coupled to source and load, the positive and negative supply pins of the ADL5920 must be connected to +5 V and ?2.5 V, respectively (relative to the dc voltage at RFIN and RFOUT). The internal detector circuitry is also dc-coupled to the directional bridge to support measurements down to 9 kHz.The maximum input signal on each of the RF ports (RFIN and RFOOUT) is 30 dBm for open and shorted terminations and 33 dBm for a matched termination.The ADL5920 draws 160 mA from a 5 V supply and has a low power, power-down mode controlled through the PWDN/TADJS pin.The device is supplied in a 32-lead, 5 mm ? 5 mm LFCSP and is specified for ambient operating temperatures in the ?40?C to +85?C range.Multifunction pin names may be referenced by their relevant function only.Applications Industrial metering Broadband inline power and return loss measurement Transmit power control and automatic level control in wireless transmitters, signal generators, network analyzers, and wireless communications testers Condition based monitoring of system modules, cables, and connectors

The ADL8104 is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise, wideband, high linearity amplifier that operates from 0.4 GHz to 7.5 GHz.The ADL8104 provides a typical gain of 15 dB at 0.6 GHz to 6 GHz, a 3.5 dB typical noise figure at 0.4 GHz to 6 GHz, a 20 dBm typical output power for 1 dB compression (OP1dB) at 0.6 GHz to 6 GHz, and a typical output third-order intercept (OIP3) of 32 dBm at 0.6 GHz to 6 GHz, requiring only 150 mA from a 5 V drain supply voltage. The low noise amplifier has a high output second-order intercept (OIP2) of 52 dBm typical at 0.6 GHz to 6 GHz, making the ADL8104 suitable for military and test instrumentation applications.The ADL8104 also features inputs and outputs that are internally matched to 50 ?. The RFIN and RFOUT pins are internally ac-coupled and the bias inductor is also integrated, making the ADL8104 ideal for surface-mounted technology (SMT)-based, high density applications.The ADL8104 is housed in an RoHS-compliant, 3 mm ? 3 mm, 16-lead LFCSP.APPLICATIONSTest instrumentationMilitary communications

The ADL8106 is a gallium arsenide (GaAs), pseudomorphic high electron mobility transfer (pHEMT), monolithic microwave integrated circuit (MMIC), wideband low noise amplifier that operates from 20 GHz to 54 GHz. The ADL8106 provides a gain of 21.5 dB, an output power for 1 dB compression (OP1dB) of 14 dBm, and a typical output third-order intercept (OIP3) of 21.5 dBm at 30 GHz to 44 GHz. The ADL8106 requires 120 mA from a 3 V supply voltage (VDD) and features inputs and outputs that are internally matched to 50 ?, facilitating integration into multichip modules (MCMs). All data is taken with the RFIN and RFOUT pads connected via one 0.076 mm (3 mil) wide gold ribbon bond of 0.076 mm to 0.152 mm (3 mil to 6 mil) minimal length.

The AD9286 is an 8-bit, monolithic sampling, analog-to-digital converter (ADC) that supports interleaved operation and is optimized for low cost, low power, and ease of use. Each ADC operates at up to a 250 MSPS conversion rate with outstanding dynamic performance.The AD9286 takes a single sample clock and, with an on-chip clock divider, time interleaves the two ADC cores (each running at one-half the clock frequency) to achieve the rated 500 MSPS. By using the SPI, the user can accurately adjust the timing of the sampling edge per ADC to minimize the image spur energy.The ADC requires a single 1.8 V supply and an encode clock for full performance operation. No external reference components are required for many applications. The digital outputs are LVDS compatible.The AD9286 is available in a Pb-free, 48-lead LFCSP that is specified over the industrial temperature range of ?40?C to +85?C. PRODUCT HIGHLIGHTS Integrated 8-bit, 500 MSPS ADC. Single 1.8 V supply operation with LVDS outputs. Power-down option controlled via a pin-programmable setting.?APPLICATIONS Battery-powered instruments Handheld scope meters Low cost digital oscilloscopes OTS: video over fiber

The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.The AD9512 is available in a 48-lead LFCSP and is specified from -40?C to +85?C. The part may be run from a single 3.3 V supply. ApplicationsLow jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE? ConvertersWireless infrastructure transceiversHigh performance instrumentationBroadband infrastructure

The AD9516-2?provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.05 GHz to 2.33 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9516-2 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements. The AD9516-2 features six LVPECL outputs (in three pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.The AD9516-0 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9516-2 is specified for operation over the standard industrial range of ?40?C to +85?C.APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation

The AD9516-4?provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.45 GHz to 1.80 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9516-4 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.The AD9516-4 features six LVPECL outputs (in three pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions, up to a maximum of 1024.The AD9516-4 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9516-4 is specified for operation over the industrial range of ?40?C to +85?C.APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation?

The AD9516-5?provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL that can be used with an external VCO/VCXO of up to 2.4 GHz.The AD9516-5 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit otherapplications with demanding phase noise and jitter requirements.The AD9516-5 features six LVPECL outputs (in three pairs)and four LVDS outputs (in two pairs). Each LVDS output canbe reconfigured as two CMOS outputs. The LVPECL outputsoperate to 1.6 GHz, the LVDS outputs operate to 800 MHz, andthe CMOS outputs operate to 250 MHz.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division forthe LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allowa range of divisions up to a maximum of 1024.The AD9516-5 is available in a 64-lead LFCSP and can beoperated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5.5 V. A separate LVPECL power supply can be from 2.375 V to 3.6 V (nominal).The AD9516-5 is specified for operation over the industrial range of ?40?C to +85?C.For applications requiring an integrated EEPROM, or needing additional outputs, the AD9520-5?and AD9522-5?are available.APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation