The ADM3483E / ADM3486E / ADM3488E / ADM3490E / ADM3491E are 3.3 V low power data transceivers with ±15 kV ESD protection suitable for full and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission and comply with TIA/EIA standards RS-485 and RS-422. The ADM3483E / ADM3486E are half-duplex transceiver that shares differential lines and has separate enable inputs for the driver and receiver. The full-duplex ADM3488E / ADM3490E / ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features enable inputs for the driver and receiver.The devices have a 12 kΩ receiver input impedance which allows up to 32 transceivers on a bus. Since only one driver should be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus. The driver outputs of the ADM3483E / ADM3486E / ADM3488E are slew rate limited, in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the commercial and industrial temperature ranges and are available in narrow 8-lead and 14-lead (ADM3491E) SOIC packages.

The ADM3483E / ADM3486E / ADM3488E / ADM3490E / ADM3491E are 3.3 V low power data transceivers with ±15 kV ESD protection suitable for full and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission and comply with TIA/EIA standards RS-485 and RS-422. The ADM3483E / ADM3486E are half-duplex transceiver that shares differential lines and has separate enable inputs for the driver and receiver. The full-duplex ADM3488E / ADM3490E / ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features enable inputs for the driver and receiver.The devices have a 12 kΩ receiver input impedance which allows up to 32 transceivers on a bus. Since only one driver should be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus. The driver outputs of the ADM3483E / ADM3486E / ADM3488E are slew rate limited, in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the commercial and industrial temperature ranges and are available in narrow 8-lead and 14-lead (ADM3491E) SOIC packages.

The ADF4360-3 is a fully integrated integer-N synthesizer andvoltage controlled oscillator (VCO). The ADF4360-3 is designedfor a center frequency of 1750 MHz. In addition, there is adivide-by-2 option available, whereby the user gets an RF output of between 800 MHz and 975 MHz. Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use. 

The AD5668 device is a low power, octal, 16-bit, buffered voltage-output DAC. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The AD5668 and AD5628 are available inboth a 4 mm × 4 mm LFCSP and a 16-lead TSSOP, while theAD5648 is available in both a 14-lead and 16-lead TSSOP.The AD5628/AD5648/AD5668 have an on-chip reference withan internal gain of 2. The AD5628-1/AD5648-1/AD5668-1 havea 1.25 V 5 ppm/°C reference, giving a full-scale output rangeof 2.5 V; the AD5628-2/AD5648-2/AD5668-2 and AD5668-3 havea 2.5 V 5 ppm/°C reference, giving a full-scale output range of5 V. The on-board reference is off at power-up, allowing the useof an external reference. The internal reference is enabled via asoftware write.The part incorporates a power-on reset circuit that ensures that theDAC output powers up to 0 V (AD5628-1/AD5648-1/AD5668-1,AD5628-2/AD5648-2/AD5668-2) or midscale (AD5668-3) andremains powered up at this level until a valid write takes place.The part contains a power-down feature that reduces the currentconsumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or allDAC channels. The outputs of all DACs can be updated simultaneouslyusing the LDAC function, with the added functionalityof user-selectable DAC channels to simultaneously update. Thereis also an asynchronous CLR that updates all DACs to a userprogrammablecode—zero scale, midscale, or full scale.The AD5628/AD5648/AD5668 utilize a versatile 3-wire serialinterface that operates at clock rates of up to 50 MHz and iscompatible with standard SPI®, QSPI™, MICROWIRE™, andDSP interface standards. The on-chip precision output amplifierenables rail-to-rail output swing.Product Highlights Octal, 12-/14-/16-bit DAC. On-chip 1.25 V/2.5 V, 5 ppm/°C reference. Available in 14-lead/16-lead TSSOP, 16-lead LFCSP, and 16-ball WLCSP. Power-on reset to 0 V or midscale. Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V. Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD7328 is an 8-channel, 12-bit plus sign, successive approximation ADC designed on the iCMOS™ (industrial CMOS) process. iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size.The AD7328 can accept true bipolar analog input signals. The AD7328 has four software-selectable input ranges, ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V. Each analog input channel can be independently programmed to one of the four input ranges. The analog input channels on the AD7328 can be programmed to be single-ended, true differential, or pseudo differential.The ADC contains a 2.5 V internal reference. The AD7328 also allows for external reference operation. If a 3 V reference is applied to the REFIN/OUT pin, the AD7328 can accept a true bipolar ±12 V analog input. Minimum ±12 V VDD and VSS supplies are required for the ±12 V input range. The ADC has a high speed serial interface that can operate at throughput rates up to 1 MSPS.PRODUCT HIGHLIGHTS The AD7328 can accept true bipolar analog input signals, ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V unipolar signals The eight analog inputs can be configured as eight single-ended inputs, four true differential input pairs, four pseudo differential inputs, or seven pseudo differential inputs 1 MSPS serial interface. SPI®-/QSPI™-/DSP-/MICROWIRE™-compatible interface Low power, 30 mW, at a maximum throughput rate of 1 MSPS Channel sequencer

The AD9832 is a numerically controlled oscillator employing a phase accumulator, a sine look-up table, and a 10-bit digital-to-analog converter (DAC) integrated on a single CMOS chip. Modulation capabilities are provided for phase modulation and frequency modulation.Clock rates up to 25 MHz are supported. Frequency accuracy can be controlled to one part in 4 billion. Modulation is effected by loading registers through the serial interface.A power-down bit allows the user to power down the AD9832 when it is not in use, the power consumption being reduced to 5 mW (5 V) or 3 mW (3 V). The part is available in a 16-lead TSSOP package.Applications Frequency stimulus/waveform generation Frequency phase tuning and modulation Low power RF/communications systems Liquid and gas flow measurement Sensory applications: proximity, motion, and defect detection Test and medical equipment

The ADF7020 is a low power, low-IF transceiver designed for operation in the license-free ISM bands at 433MHz, 868MHz and 915MHz. It is suitable for circuit applications that meet either the European ETSI EN-300-220 or the North American FCC, Part 15.247 and 15.249 regulatory standards. It operates from a 2.3 V to 3.6V power supply with programmable output power from -16 to +13dBm in 0.3dBm steps. Its receiver sensitivity is -117.5dBm at 1kbits/s in FSK mode or -110.5dBm at 9.6kbits/s. Power consumption is 20mA in receive mode and 30mA in transmit mode (+10dBm output).Other features include on-chip VCO (voltage controlled oscillator), Fractional-N PLL, on-chip 7-bit ADC (analog-to-digital converter), digital received signal strength indication (RSSI), temperature sensor and a patent pending fully automatic AFC loop. This allows the ADF7020 to be used with lower tolerance crystals. Its leakage current is < 1uA in power down mode.This device is suitable for circuit applications that meet the European ETSI-300-220, the North American FCC (Part 15), or the Chinese Short Range Device regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7020 very suitable for price-sensitive and area-sensitive applications. The transmitter block on the ADF7020 contains a VCO and low noise fractional-N PLL with an output resolution of <1 ppm. This frequency agile PLL allows the ADF7020 to be used in frequency-hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency-pulling problems.The transmitter output power is programmable in 0.3 dB steps from −16 dBm to +13 dBm. The transceiver RF frequency and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (200 kHz), minimizing power consumption and the external component count and avoiding interference problems at low frequencies. The ADF7020 supports a wide variety of programmable features, including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, or the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ±10°C over the full operating temperature range of −40°C to +85°C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.APPLICATIONS Low cost wireless data transfer Remote control/security systems Wireless metering Keyless entry Home automation Process and building control Wireless voice

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