20 V, 6 A, Synchronous, Step-Down DC-to-DC Regulator Features: Input voltage range: 4.5 V to 20 V Integrated MOSFET: 44 mΩ typical/11 mΩ typical Reference voltage: 0.6 V ± 1% Continuous output current: 6 A Programmable current-limit thresholdProgrammable switching frequency: 200 kHz to 1400 kHz Precision enable and power good External compensation Internal soft start with external adjustable option Startup into a precharged output Supported by ADIsimPower design tool

18 V, 12 A Step-Down Regulator with Programmable Current Limit Features: Input voltage: 4.5 V to 18 V Continuous output current: 12 A Integrated MOSFETs: 17 mΩ high-side/4.5 mΩ low-side 0.6 V ± 0.5% reference voltage Programmable switching frequency range: 200 kHz to 2200 kHz Enhanced transient response Programmable current limit with ±10% accuracy Precision enable and power good External compensation and soft start Start up into a precharged output Supported by the ADIsimPower design tool

3 A, 36 V, Synchronous Step-Down DC-to-DC Regulator Features: Continuous output current: 3 A Input voltage: 4.5 V to 36 V Integrated MOSFETs: 98 mΩ/35 mΩ Reference voltage: 0.6 V ± 1% Fast minimum on time: 50 ns Programmable switching frequency: 200 kHz to 1.8 MHz Synchronizes to external clock: 200 kHz to 1.8 MHz Precision enable and power good Cycle-by-cycle current limit with hiccup protection External compensation Programmable soft start time Startup into a precharged output Supported by ADIsimPower design tool

600 mA, 2.5 MHz Buck-Boost DC-to-DC Converter Features: 1 mm height profile Compact PCB footprint Seamless transition between modes 38 μA typical quiescent current 2.5 MHz operation enables 1.5 μH inductor Input voltage: 2.3 V to 5.5 V Fixed output voltage: 2.8 V to 5.0 V See data sheet for additional features

20V High Efficiency Nanopower Step-Down Regulator Features: 720nA Input IQ in Regulation (No Load), VIN = 4V 820nA Input IQ in Regulation (No Load), VIN = 20V 400nA Input IQ in UVLO 2.7V to 20V Input Operating Range Up to 50mA of Output Current Pin Selectable Output Voltages: 1.2V, 1.5V, 1.8V, 2.5V (LTC3388-1) 2.8V, 3.0V, 3.3V, 5.0V (LTC3388-3) High Efficiency Hysteretic Synchronous DC/DC Conversion Standby Mode Disables Buck Switching Available in 10-Lead MSE and 3mm × 3mm DFN Packages

4T2R Direct RF Transmitter and Observation Receiver Features: Flexible reconfigurable radio common platform design Transmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R) RFDAC/RFADC RF frequency range up to 7.5 GHz On-chip PLL with multichip synchronization External RFCLK input option Versatile digital features Configurable digital up/down conversion (DDC and DUC) 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs, 2 independent 48-bit NCO per DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Programmable delay and gain per transmit data path Coarse DDC delay adjust for DPD observation path Auxiliary features Power amplifier downstream protection circuitry On-chip temperature monitoring unit Programmable GPIO pins supporting different user configurations ADC clock driver with selectable divide ratios TDD power savings option and sharing ADCs SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes per each DAC and ADC JESD204B compatible with maximum 15.5 Gbps lane rate JESD204C compatible with maximum 24.75 Gbps lane rate Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

4T4R Direct RF Receiver and Transmitter Features: Flexible, reconfigurable radio common platform design Transmitter/receiver channel bandwidth up to 1.2 GHz (4T4R) RF DAC/RF ADC RF frequency range up to 7.5 GHz On-chip PLL with multichip synchronization External RF clock input option Versatile digital features Selectable interpolation and decimation filters Configurable DDCs and DUCs 8 fine complex DUCs (FDUC) and 4 coarse complex DUCs (CDUC) 8 fine complex DDCs (FDDC) and 4 coarse complex DDCs (CDDC) FDUCs and FDDCs are fully bypassable 2 independent 48-bit NCOs per DUC or DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Programmable delay and gain per transmit data path Coarse DDC delay adjust for DPD observation path Supports real or complex digital data (8-, 12-, or 16-bit) Auxiliary features ADC clock driver with selectable divide ratios Power amplifier downstream protection circuitry On-chip temperature monitoring unit Programmable GPIO pins support toggling between modes TDD power savings option and sharing ADCs SERDES JESD204B or JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes JESD204B/C transmitter (JTx) and 8 lanes JESD204B/C receiver (JRx) Supports Subclass 1 Supports multidevice synchronization 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

400 MHz TO 4000 MHz Low Noise Amplifier Features: Operation from 400 MHz to 4000 MHz Noise figure of 0.8 dB at 900 MHz Requires few external components Integrated active bias control circuit Integrated dc blocking capacitors Adjustable bias for low power applications Single-supply operation from 3 V to 5 V Gain of 20.8 dB at 900 MHz OIP3 of 37.0 dBm at 900 MHz P1dB of 21.8 dBm at 900 MHz Small footprint LFCSP Pin-compatible version with 21.5 dB gain available

Cascadable Super Sequencer with Margin Control and Fault Recording Features: Complete supervisory and sequencing solution for up to 17 supplies Expandable to 257 supplies with additional ADM1266 ICs connected to the 2-wire interdevice bus Fully programmable sequencing engine 17 supply fault detectors enable real time supervision of supplies 0.4 V to 15 V on VH1 to VH4 (VHx) 0.4 V to 5 V on VP1 to VP13 (VPx) Device powered by the higher of VH1 and VH2 inputs for improved operating redundancy 12-bit ADC for readback of all supervised voltages Black box nonvolatile fault recording 16 PDIOs 9 GPIOs 9 voltage output 8-bit DACs allow voltage margining adjustment via dc-to-dc converter trim/feedback node Main and backup memory Industry standard PMBus interface compliant Available in a 9 mm × 9 mm, 64-lead package

High Voltage Input Protection Device Features: Controls supply voltages from 4 V to 60 V Gate drive for low voltage drop reverse supply protection Gate drive for P-channel FETs Inrush current limiting control Adjustable current limit Foldback current limiting Automatic retry or latch-off on current fault Programmable current-limit timer for safe operating area (SOA) Power-good and fault outputs Analog undervoltage (UV) and overvoltage (OV) protection 16-lead, 3 mm × 3 mm LFCSP 16-lead QSOP