The ADG3300 is a bidirectional logic level translator that contains eight bidirectional channels. It can be used in multivoltage digital system applications such as data transfer between a low voltage DSP/controller and a higher voltage device. The internal architecture allows the device to perform bidirectional logic level translation without an additional signal to set the direction of the translation.The voltage applied to VCCA sets the logic levels on the A side of the device, while VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA-compatible logic signals applied to the A side of the device appear as VCCY-compatible levels on the Y side. Similarly, VCCY-compatible logic levels applied to the Y side of the device appear as VCCA-compatible logic levels on the A side.The enable pin provides three-state operation of the Y side pins. When the enable pin (EN) is pulled low, the A1 to A8 pins are internally pulled down by 6 kΩ resistors, while the Y terminals are in the high impedance state. The EN pin is referred to VCCA supply voltage and driven high for normal operation.The ADG3300 is available in a compact 20-lead TSSOP package, and it is guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and extended −40°C to +85°C temperature range.PRODUCT HIGHLIGHTS Bidirectional level translation. Fully guaranteed over the 1.15 V to 5.5 V supply range. No direction pin. 20-lead TSSOP package.APPLICATIONS Low Voltage ASIC Level Translation Smart Card Readers Cell Phones and Cell Phone Cradles Portable Communications Devices Telecommunications Equipment Network Switches and Routers Storage Systems (SAN/NAS) Computing/Server Applications GPS Portable POS Systems Low Cost Serial Interfaces

The ADG3308 is a bidirectional level translator containing eight bidirectional channels. The ADG3308 can be used in multivoltage digital system applications, such as a data transfer between a low voltage DSP controller and a higher voltage device. The internal architecture allows the device to perform bidirectional level translation without an additional signal to set the direction in which the translation takes place.The voltage applied to VCCA sets the logic levels on the A side of the device, and VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA compatible logic signals applied to the A side of the device appear as VCCY compatible levels on the Y side. Similarly, VCCY compatible logic levels applied to the Y side of the device appear as VCCA compatible logic levels on the A side.The enable pin (EN) provides three-state operation on both the A side and the Y side pins. When the EN pin is pulled low, the terminals on both sides of the device are in the high impedance state. For normal operation, EN should be driven high.The ADG3308 is available in a compact 20-lead TSSOP and a 20-lead LFCSP. The EN pin is referred to the VCCY supply voltage. The ADG3308 is guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and the extended −40°C to +85°C temperature range.Product Highlights Bidirectional logic level translation. Fully guaranteed over the 1.15 V to 5.5 V supply range. No direction pin. Packages: 20-lead TSSOP and 20-lead LFCSPApplications Low voltage ASIC level translation Smart card readers Cell phones and cell phone cradles Portable communication devices Telecommunications equipment Network switches and routers Storage systems (SAN/NAS) Computing/server applications GPS Portable POS systems Low cost serial interfaces

The ADG526A and ADG527A are CMOS monolithic analog multiplexers with 16 single channels and dual 8 channels, respectively. On-chip latches facilitate microprocessor interfacing. The ADG526A switches one of 16 inputs to a common output, depending on the state of four binary addresses and an enable input. The ADG527A switches one of eight differential inputs to a common differential output, depending on the state of three binary addresses and an enable input. Both devices have TTL and 5 V CMOS logic-compatible digital inputs. The ADG526A and ADG527A are designed on an enhanced LC2MOS process that gives an increased signal capability of VSS to VDD and enables operation over a wide range of supply voltages. The devices can comfortably operate anywhere in the 10.8 V to 16.5 V single- or dual-supply range. These multiplexers also feature high switching speeds and low RON. PRODUCT HIGHLIGHTS Single- or Dual-Supply Specifications with a Wide Tolerance. The devices are specified in the 10.8 V to 16.5 V range for both single and dual supplies. Easily Interfaced. The ADG526A and ADG527A can be easily interfaced with microprocessors. The WR signal latches the state of the address control lines and the enable line. The RS signal clears both the address and enable data in the latches, resulting in no output (all switches off). RS can be tied to the microprocessor reset pin. Extended Signal Range. The enhanced LC2MOS processing results in a high breakdown and an increased analog signal range from VSS to VDD. Break-Before-Make Switching. Switches are guaranteed break-before-make so that input signals are protected against momentary shorting. Low Leakage. Leakage currents in the range of 20 pA make these multiplexers suitable for high precision circuits.APPLICATIONS Data acquisition systems Communication systems Automatic test equipment Microprocessor controlled systems

The ADG601 / ADG602 are monolithic, CMOS single-pole single-throw (SPST) switches with on resistance typically less than 2.5 Ω. The low on-resistance flatness makes the ADG601 / ADG602 ideally suited to many applications, particularly those requiring low distortion. These switches are ideal replacements for mechanical relays because they are more reliable, have lower power requirements, and are available in much smaller package sizes.The ADG601 is a normally open (NO) switch, and the ADG602 is a normally closed (NC) switch. Each switch conducts equally well in both directions when the device is on, with the input signal range extending to the supply rails.The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die.PRODUCT HIGHLIGHTS Low on resistance (2 Ω typical) Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die Rail-to-rail input signal rangeAPPLICATIONS Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacement Battery-powered systems

The ADG609 is a monolithic CMOS analog multiplexer comprising four differential channels. The ADG609 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched OFF.The ADG609 is designed on an enhanced LC2 MOS process which provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range which extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break before make switching action preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The SSM2305 is a fully integrated, high efficiency, Class-Daudio amplifier designed to maximize performance for mobilephone applications. The application circuit requires a minimumof external components and operates from a single 2.5 V to 5.5 Vsupply. It is capable of delivering 2.2 W of continuous outputpower with less than 1% THD + N driving a 4 Ω load from a5.0 V supply. It has built-in thermal shutdown and output short-circuitprotection.The SSM2305 features a high efficiency, low noise modulationscheme that does not require external LC output filters. The modulationprovides high efficiency even at low output power. TheSSM2305 operates with 90% efficiency at 1.3 W into 8 Ω or 83%efficiency at 2.2 W into 4 Ω from a 5.0 V supply and has an SNR of>98 dB. Spread-spectrum pulse density modulation is used toprovide lower EMI-radiated emissions compared with otherClass-D architectures.The SSM2305 has a micropower shutdown mode with a maximumshutdown current of 30 nA. Shutdown is enabled by applyinga Logic 0 to the SD pin. The device also includes pop-and-clicksuppression circuitry. This minimizes voltage glitches at theoutput during turn-on and turn-off, thus reducing audible noiseon activation and deactivation.The fully differential input of the SSM2305 provides excellentrejection of common-mode noise on the input. Input couplingcapacitors can be omitted if the dc input common-mode voltageis approximately VDD/2.The SSM2305 has excellent rejection of power supply noise,including noise caused by GSM transmission bursts and RFrectification. PSRR is typically 60 dB at 217 Hz.The default gain of the SSM2305 is 18 dB, but users can reduce thegain by using a pair of external resistors.The SSM2305 is specified over the commercial temperature range(−40°C to +85°C). It is available in both an 8-lead, 3 mm × 3 mmlead frame chip scale package (LFCSP) and an 8-lead mini smalloutline package (MSOP). Applications Mobile phones MP3 players Portable gaming Portable electronics Educational toys

The TMP05 / TMP06 are monolithic temperature sensors that generate a modulated serial digital output (PWM), which varies in direct proportion to the temperature of the devices. The high period (TH) of the PWM remains static over all temperatures, while the low period (TL) varies. The B Grade version offers a high temperature accuracy of ±1°C from 0°C to 70°C with excellent transducer linearity. The digital output of the TMP05 / TMP06 is CMOS-/TTL-compatible and is easily interfaced to the serial inputs of most popular microprocessors. The flexible open-drain output of the TMP06 is capable of sinking 5 mA.The TMP05 / TMP06 are specified for operation at supply voltages from 3 V to 5.5 V. Operating at 3.3 V, the supply current is typically 370 μA. The TMP05 / TMP06 are rated for operation over the –40°C to +150°C temperature range. It is not recommended to operate these devices at temperatures above 125°C for more than a total of 5% (5,000 hours) of the lifetime of the devices. They are packaged in low cost, low area SC-70 and SOT-23 packages.The TMP05 / TMP06 have three modes of operation: continuously converting mode, daisy-chain mode, and one shot mode. A three-state FUNC input determines the mode in which the TMP05 / TMP06 operate.The CONV/IN input pin is used to determine the rate at which the TMP05 / TMP06 measures temperature in continuously converting mode and one shot mode. In daisy-chain mode the, CONV/IN pin operates as the input to the daisy chain.PRODUCT HIGHLIGHTS The TMP05/TMP06 have an on-chip temperature sensor that allows an accurate measurement of the ambient temperature. The measurable temperature range is –40°C to +150°C. Supply voltage is 3 V to 5.5 V. Space-saving 5-lead SOT-23 and SC-70 packages. Temperature accuracy is typically ±0.5°C. Each part needs a decoupling capacitor to achieve this accuracy. Temperature resolution of 0.025°C. The TMP05/TMP06 feature a one shot mode that reduces the average power consumption to 102 μW at 1 SPS.APPLICATIONS Isolated sensors Environmental control systems Computer thermal monitoring Thermal protection Industrial process control Power-system monitors

The ADAU1978 incorporates four high performance, analog-to-digital converters (ADCs) with 2 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume and many other parameters. The ADAU1978 uses only a single 3.3 V supply. The part internally generates the required digital DVDD supply. The low power architecture reduces the power consumption. The ADAU1978 is available in a 40-lead LFCSP package. The on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame clock, it eliminates the need for a separate high frequency master clock in the system.Note that throughout this data sheet, multifunction pins, such as SCL/CCLK, are referred to either by the entire pin name or by a single function of the pin, for example, CCLK, when only that function is relevant. APPLICATIONS Automotive audio systems Active noise cancellation system

The ADF4159 is a 13 GHz, fractional-N frequency synthesizer with modulation and both fast and slow waveform generation capability. The part uses a 25-bit fixed modulus, allowing subhertz frequency resolution.The ADF4159 consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. The Σ-Δ-based fractional interpolator allows programmable fractional-N division. The INT and FRAC registers define an overall N divider as N = INT + (FRAC/225).The ADF4159 can be used to implement frequency shift keying (FSK) and phase shift keying (PSK) modulation. Frequency sweep modes are also available to generate various waveforms in the frequency domain, for example, sawtooth and triangular waveforms. Sweeps can be set to run automatically, or each step manually triggered by an external pulse. The ADF4159 features cycle slip reduction circuitry, which enables faster lock times without the need for modifications to the loop filter.Control of all on-chip registers is via a simple 3-wire interface. The ADF4159 operates with an analog power supply in the range of 2.7 V to 3.45 V and a digital power supply in the range of 1.62 V to 1.98 V. The device can be powered down when not in use.ApplicationsCommunications infrastructureCommunications test equipmentInstrumentationFMCW radars

The ADF7024 is an ultralow power, integrated transceiver for use in the license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. Its ease of use and high performance make it suitable for a wide variety of wireless applications. The ADF7024 is suitable for operation under the European ETSI EN 300-220 regulation, the North American FCC Part 15 regulation, and other similar regulatory standards.The ADF7024 can operate under a number of predefined radio profiles. For each radio profile, optimized register settings are provided for the ADF7024 radio. This ensures that the RF communication layer works seamlessly, allowing the user to concentrate on the protocol and system level design and prototyping. The radio profiles cover common data rate and modulation options. There are six radio profiles in total, as shown in Table 1.The ADF7024 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems while maintaining excellent RF performance.The low IF receiver minimizes power consumption and provides excellent sensitivity. The receiver is exceptionally linear and, therefore, is very resilient to the presence of interferers in spectrally noisy environments. The highly efficient transmitter has programmable output power up to 13.5 dBm and automatic power amplifier (PA) ramping to meet transient spurious specifications. The RF synthesizer comprises a voltage controlled oscillator (VCO), a low noise fractional-N phase-locked loop (PLL) and a loop filter, all of which are fully integrated and automatically calibrated. This agile frequency synthesizer facilitates the implementation of frequency-hopping spread spectrum (FHSS) systems.The smart wake mode (SWM) allows the ADF7024 to wake up autonomously from sleep using the internal wake-up timer without intervention from the host processor. This functionality allows carrier sense, packet sniffing, and packet reception while the host processor is in sleep, thereby reducing overall system current consumption.The ADF7024 eases the processing burden of the host processor by integrating the lower layers of a typical communication protocol stack. The host processor can configure the ADF7024 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller).For more information, see the ADF7024 Hardware Reference Manual, UG-698, which is only available as part of the ADF7024 design resource package.APPLICATIONS Wireless sensor networks (WSNs) Home and building automation Asset tracking Process and building control Industrial control Internet of Things (IoT)