The HMC851LC3C is a XOR/XNOR gate function designed to support data transmission rates of up to 28 Gbps, and clock frequencies as high as 28 GHz. The HMC851LC3C also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.All input signals to the HMC851LC3C are terminated with 50 Ohms to ground on-chip, and may be either AC or DC coupled. The differential outputs of the HMC851LC3C may be either AC or DC coupled. Outputs can be connected directly to a 50 Ohm to ground terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to a nonground DC voltage. The HMC851LC3C operates from a single -3.3V DC supply, and is available in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS RF ATE Applications Broadband Test & Measurement Serial Data Transmission up to 28 Gbps

HMC983LP5E is a fractional frequency divider targeted for fractional-N frequency synthesis, and stand-alone low noise frequency divider applications that require exceptional spurious performance.Although the HMC983LP5E can work with any VCO and/or compatible Phase Detector, best performance and features will be achieved when paired with the companion part, the HMC984LP4E.Fabricated in SiGe BiCMOS process, the HMC983LP5E features a 48-bit Delta Sigma Fractional Modulator (DSM) with programmable phase accumulator size, enabling precise control of frequency step size and resolution. Integrated DSM can generate frequencies with nearly 0 Hz frequency error. The DSM also includes a built-in programmable frequency sweep capability, with various automatic and user defined sweep modes and triggering options, including hardware trigger pin, or SPI trigger with optional delayed trigger.HMC983LP5E is a versatile part capable of various configurations. It has 5 general purpose I/Os (GPIOs). DSM outputs are made available from the GPIO port, enabling the HMC983LP5E to import and/or export DSM sequences for various configuration options.HMC983LP5E divider outputs are differential, open collector with programmable current to accommodate different off-chip loads.Applications Test Equipment Portable Instruments High Performance Fractional-N Frequency Synthesizers with Ultra Low Spurious Stand-Alone Divider and/or Delta-Sigma Modulator

The HMC992LP5E is an IF analog controlled variable gain amplifier composed of two identical voltage variable attenuators in combination with an InGaP HBT gain block MMIC amplifier which operates from 0.1 to 0.8 GHz, and can be controlled to provide anywhere from -10 dB attenuation, to 40 dB of gain. The HMC992LP5E delivers noise figure of 6 dB in its maximum gain state, with output IP3 of up to +40 dBm. The HMC992LP5E is housed in a RoHS compliant 5x5 mm QFN leadless package, and requires no external matching components.Applications Cellular/3G Infrastructure WiBro / WiMAX / 4G Microwave Radio & VSAT Test Equipment and Sensors IF & RF Applications

The AD5543/AD5553 are precision 16-/14-bit, low power, current output, small form factor digital-to-analog converters (DACs). They are designed to operate from a single 5 V supply with a ±10 V multiplying reference.The applied external reference, VREF, determines the full-scale output current. An internal feedback resistor (RFB) facilitates the R-2R and temperature tracking for voltage conversion when combined with an external operational amplifier.A serial data interface offers high speed, 3-wire microcontroller-compatible inputs using serial data in (SDI), clock (CLK), and chip select (CS).The AD5543/AD5553 are packaged in ultracompact (3 mm × 4.7 mm) 8-lead MSOP and 8-lead SOIC packages.Applications Automatic test equipment Instrumentation Digitally controlled calibration Industrial control programmable logic controllers

The AD565A and AD566A are fast 12-bit digital-to-analog converters which incorporate the latest advances in analog circuit design to achieve high speeds at low cost.The AD565A and AD566A use 12 precision, high-speed bipolar current-steering switches, control amplifier and a laser-trimmed thin-film resistor network to produce a very fast, high accuracy analog output current. The AD565A also includes a buried Zener reference that features low-noise, long-term stability and temperature drift characteristics comparable to the best discrete reference diodes.The combination of performance and flexibility in the AD565A and AD566A has resulted from major innovations in circuit design, an important new high-speed bipolar process, and continuing advances in laser-wafer-trimming techniques (LWT). The AD565A and AD566A have a 10-90% full-scale transition time less than 35 ns and settle to within ±1/2 LSB in 250 ns max (350 ns for AD566A). Both are laser-trimmed at the wafer level to ±1/8 LSB typical linearity and are specified to ±1/4 LSB max error (K and T grades) at +25°C. High speed and accuracy make the AD565A and AD566A the ideal choice for high-speed display drivers as well as fast analog-to-digital converters.The laser trimming process which provides the excellent linearity is also used to trim both the absolute value and the temperature coefficient of the reference of the AD565A resulting in a typical full-scale gain TC of 10 ppm/°C. When tighter TC performance is required or when a system reference is available, the AD566A may be used with an external reference.AD565A and AD566A are available in four performance grades. The J and K are specified for use over the 0°C to +70°C temperature range while the S and T grades are specified for the -55&176;C to +125°C range. The D grades are all packaged in a 24-pin, hermetically sealed, ceramic, dual-in-line package. The JR grade is packaged in a 28-pin plastic SOIC.

The AD569 is a monolithic 16-bit digital-to-analog converter (DAC) manufactured in Analog Devices' BiMOS II process. BiMOS II allows the fabrication of low power CMOS logic functions on the same chip as high precision bipolar linear circuitry. The AD569 chip includes two resistor strings, selector switches decoding logic, buffer amplifiers, and double-buffered input latches.The AD569's voltage-segmented architecture insures 16-bit monotonicity over time and temperature. Integral nonlinearity is maintained at ±0.01%, while differential nonlinearity is ±0.0004%. The on-chip, high-speed buffer amplifiers provide a voltage output settling time of 3 µs to within ±0.001% for a full-scale step.The reference input voltage which determines the output range can be either unipolar or bipolar. Nominal reference range is ±5 V and separate reference force and sense connections are provided for high accuracy applications. The AD569 can operate with an ac reference in multiplying applications.Data may be loaded into the AD569's input latches from 8- and 16-bit buses. The double-buffered structure simplifies 8-bit bus interfacing and allows multiple DACs to be loaded asynchronously and updated simultaneously. Four TTL/LSTTL/5 V CMOS-compatible signals control the latches: CS, LBE, HBE, and LDAC.The AD569 is available in five grades: J and K versions are specified from 0°C to +70°C and are packaged in a 28-pin plastic DIP and 28-pin PLCC package; AD and BD versions are specified from −25°C to +85°C and are packaged in a 28-pin ceramic DIP. The SD version, also in a 28-pin ceramic DIP, is specified from −55°C to +125°C.

The AD632 is an internally trimmed monolithic four-quadrant multiplier/divider. The AD632B has a maximum multiplying error of ±0.5% without external trims.Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse conditions. The simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control functions.The AD632 is pin-for-pin compatible with the industry standard AD532 with improved specifications and a fully differential high impedance Z-input. The AD632 is capable of providing gains of up to X10, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD632 can be effectively employed as a variable gain differential inputamplifier with high common-mode rejection. The effectiveness of the variable gain capability is enhanced by the inherent low noise of the AD632: 90 µV rms.APPLICATIONS High quality analog signal processing Differential ratio and percentage computations Algebraic and trigonometric function synthesis Accurate voltage controlled oscillators and filtersPRODUCT HIGHLIGHTS Guaranteed performance over temperature. The AD632A and AD632B are specified for maximum multiplying errors of ±1.0% and ±0.5% of full scale, respectively, at +25°C and are rated for operation from −25°C to +85°C. Maximum multiplying errors of ±2.0% (AD632S) and ±1.0% (AD632T) are guaranteed over the extended temperature range of −55°C to +125°C. High reliability. The AD632S and AD632T series are available with MIL-STD-883 Level B screening. All devices are available in either the hermetically sealed TO-100 metal can or ceramic DIP package.

The AD648 is a matched pair of low power, precision monolithic operational amplifiers. It offers both low bias current (10 pA max, warmed up) and low quiescent current (400 µA max) and is fabricated with ion-implanted FET and laser wafer trimming technologies. Input bias current is guaranteed over the AD648's entire common-mode voltage range.The economical J grade has a maximum guaranteed offset voltage of less than 2 mV and an offset voltage drift of less than 20 µV/°C. The combination of low quiescent current and low offset voltage drift minimizes changes in input offset voltage due to self-heating effects. The AD648 is recommended for any dual supply op amp application requiring low power and excellent dc and ac performance. In applications such as battery-powered, precision instrument front ends and CMOS DAC buffers, the AD648's excellent combination of low input offset voltage and drift, low bias current and low 1/f noise reduces output errors. High common-mode rejection and high open-loop gain ensures better than 12-bit linearity in high impedance, buffer applications.The AD648 is pinned out in a standard dual op amp configuration and is available in seven performance grades. The AD648J and AD648K are rated over the commercial temperature range of 0°C to +70°C. The AD648 is available in an 8-pin plastic mini-DIP and SOIC package.

The AD648 is a matched pair of low power, precision monolithic operational amplifiers. It offers both low bias current (10 pA max, warmed up) and low quiescent current (400 µA max) and is fabricated with ion-implanted FET and laser wafer trimming technologies. Input bias current is guaranteed over the AD648's entire common-mode voltage range.The economical J grade has a maximum guaranteed offset voltage of less than 2 mV and an offset voltage drift of less than 20 µV/°C. The combination of low quiescent current and low offset voltage drift minimizes changes in input offset voltage due to self-heating effects. The AD648 is recommended for any dual supply op amp application requiring low power and excellent dc and ac performance. In applications such as battery-powered, precision instrument front ends and CMOS DAC buffers, the AD648's excellent combination of low input offset voltage and drift, low bias current and low 1/f noise reduces output errors. High common-mode rejection and high open-loop gain ensures better than 12-bit linearity in high impedance, buffer applications.The AD648 is pinned out in a standard dual op amp configuration and is available in seven performance grades. The AD648J and AD648K are rated over the commercial temperature range of 0°C to +70°C. The AD648 is available in an 8-pin plastic mini-DIP and SOIC package.

The AD660 DACPORT® is a complete 16-bit monolithic digital-to-analog converter with an on-board voltage reference, double-buffered latches, and an output amplifier. It is manufactured on the Analog Devices, Inc., BiMOS II process. This process allows the fabrication of low power CMOS logic functions on the same chip as high precision bipolar linear circuitry.The AD660 architecture ensures 15-bit monotonicity over time and temperature. Integral and differential nonlinearity is maintained at ±0.003% maximum. The on-chip output amplifier provides a voltage output settling time of 10 μs to within ½ LSB for a full-scale step.The AD660 has an extremely flexible digital interface. Data can be loaded into the AD660 in serial mode or as two 8-bit bytes. This is made possible by two digital input pins that have dual functions. The serial mode input format is pin selectable to be MSB or LSB first. The serial output pin allows the user to daisy-chain several AD660 devices by shifting the data through the input latch into the next DAC, thus minimizing the number of control lines required to SIN, CS and LDAC. The byte mode input format is also flexible in that the high byte or low byte data can be loaded first. The double buffered latch structure eliminates data skew errors and provides for simultaneous updating of DACs in a multiDAC system.The AD660 is available in five grades. AN and BN versions are specified from −40°C to +85°C and are packaged in a 24-lead300 mil plastic DIP. AR and BR versions are also specified from −40°C to +85°C and are packaged in a 24-lead SOIC. The SQ version is packaged in a 24-lead 300 mil CERDIP package and is also available compliant to MIL-STD-883. Refer to the AD660SQ/883B military data sheet for specifications and test conditions.PRODUCT HIGHLIGHTS The AD660 is a complete 16-bit DAC, with a voltage reference, double-buffered latches, and an output amplifier on a single chip. The internal buried Zener reference is laser trimmed to 10.000 V with a ±0.1% maximum error and a temperature drift performance of ±15 ppm/°C. The reference is available for external applications. The output range of the AD660 is pin programmable and can be set to provide a unipolar output range of 0 V to 10 V or a bipolar output range of −10 V to +10 V. No external components are required. The AD660 is both dc and ac specified. DC specifications include ±1 LSB INL and ±1 LSB DNL errors. AC specifications include 0.009% THD + N and 83 dB SNR. The double-buffered latches on the AD660 eliminate data skew errors and allow simultaneous updating of DACs in multiDAC applications. The clear function can asynchronously set the output to 0 V regardless of whether the DAC is in unipolar or bipolar mode. The output amplifier settles within 10 μs to ±½ LSB for a full-scale step and within 2.5 μs for a 1 LSB step over temperature. The output glitch is typically 15 nV-s when a full-scale step is loaded. Data Sheet, Rev. B, 6/08