The ADM3483E / ADM3486E / ADM3488E / ADM3490E / ADM3491E are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards RS485 and RS-422. The ADM3483E / ADM3486E are half-duplex transceivers that share differential lines and have separate enable inputs for the driver and receiver. The full-duplex ADM3488E / ADM3490E / ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features separate enable inputs for the driver and receiver.The devices have a 12 kΩ receiver input impedance, which allows up to 32 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.The driver outputs of the ADM3483E / ADM3486E / ADM3488E are slew rate limited, in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the industrial temperature range and are available in 8-lead and 14-lead narrow SOIC packages.APPLICATIONS Power/energy metering Telecommunications EMI-sensitive systems Industrial control Local area networks

The AD5280/AD5282 are single-channel and dual-channel, 256-position, digitally controlled variable resistors (VRs)2. The devices perform the same electronic adjustment function as a potentiometer, trimmer, or variable resistor. Each VR offers a completely programmable value of resistance between the A terminal and the wiper or the B terminal and the wiper. The fixed A-to-B terminal resistance of 20 kΩ, 50 kΩ, or 200 kΩ has a 1% channel-to-channel matching tolerance. The nominal temperature coefficient of both parts is 30 parts per million/ degrees centigrade (ppm/°C). Another key feature is that the parts can operate up to +15 V or ±5 V.Wiper position programming defaults to midscale at system power-on. When powered, the VR wiper position is programmed by an I2C-compatible, 2-wire serial data interface. The AD5280/ AD5282 feature sleep mode programmability. This allows any level of preset in power-up and is an alternative to a costly EEPROM solution. Both parts have additional programmable logic outputs that enable users to drive digital loads, logic gates, LED drivers, and analog switches in their system.The AD5280/AD5282 are available in thin, surface-mounted 14-lead TSSOP and 16-lead TSSOP. All parts are guaranteed to operate over the extended industrial temperature range of −40°C to +85°C. For 3-wire SPI-compatible interface applica-tions, see the AD5260/AD5262 product information on www.analog.com.Applications Multimedia, video, and audio Communications Mechanical potentiometer replacement Instrumentation: gain, offset adjustment Programmable voltage source Programmable current source Line impedance matching1 Assert shutdown and program the device during power-up, then deassert the shutdown to achieve the desired preset level.2 The terms digital potentiometer, VR, and RDAC are used interchangeably.

The AD5280 / AD5282 are single-channel and dual-channel, 256-position, digitally controlled variable resistors (VRs). The devices perform the same electronic adjustment function as a potentiometer, trimmer, or variable resistor. Each VR offers a completely programmable value of resistance between the A terminal and the wiper or the B terminal and the wiper. The fixed A-to-B terminal resistance of 20 kΩ, 50 kΩ, or 200 kΩ has a 1% channel-to-channel matching tolerance. The nominal temperature coefficient of both parts is 30 parts per million/ degrees centigrade (ppm/°C). Another key feature is that the parts can operate up to +15 V or ±5 V.Wiper position programming defaults to midscale at system power-on. When powered, the VR wiper position is programmed by an I2C-compatible, 2-wire serial data interface. The AD5280 / AD5282 feature sleep mode programmability. This allows any level of preset in power-up and is an alternative to a costly EEPROM solution. Both parts have additional programmable logic outputs that enable users to drive digital loads, logic gates, LED drivers, and analog switches in their system.The AD5280/AD5282 are available in thin, surface-mounted 14-lead TSSOP and 16-lead TSSOP. All parts are guaranteed to operate over the extended industrial temperature range of −40°C to +85°C. For 3-wire SPI-compatible interface applications, see the AD5260 / AD5262 product information on www.analog.comAPPLICATIONS Multimedia, video, and audio Communications Mechanical potentiometer replacement Instrumentation: gain, offset adjustment Programmable voltage source Programmable current source Line impedance matching

The AD5280 / AD5282 are single-channel and dual-channel, 256-position, digitally controlled variable resistors (VRs). The devices perform the same electronic adjustment function as a potentiometer, trimmer, or variable resistor. Each VR offers a completely programmable value of resistance between the A terminal and the wiper or the B terminal and the wiper. The fixed A-to-B terminal resistance of 20 kΩ, 50 kΩ, or 200 kΩ has a 1% channel-to-channel matching tolerance. The nominal temperature coefficient of both parts is 30 parts per million/ degrees centigrade (ppm/°C). Another key feature is that the parts can operate up to +15 V or ±5 V.Wiper position programming defaults to midscale at system power-on. When powered, the VR wiper position is programmed by an I2C-compatible, 2-wire serial data interface. The AD5280 / AD5282 feature sleep mode programmability. This allows any level of preset in power-up and is an alternative to a costly EEPROM solution. Both parts have additional programmable logic outputs that enable users to drive digital loads, logic gates, LED drivers, and analog switches in their system.The AD5280/AD5282 are available in thin, surface-mounted 14-lead TSSOP and 16-lead TSSOP. All parts are guaranteed to operate over the extended industrial temperature range of −40°C to +85°C. For 3-wire SPI-compatible interface applications, see the AD5260 / AD5262 product information on www.analog.comAPPLICATIONS Multimedia, video, and audio Communications Mechanical potentiometer replacement Instrumentation: gain, offset adjustment Programmable voltage source Programmable current source Line impedance matching

The AD5308 / AD5318 / AD5328 are octal 8-, 10-, and 12-bit buffered voltage output DACs in a 16-lead TSSOP. They operate from a single 2.5 V to 5.5 V supply, consuming 0.7 mA typical at 3 V. Their on-chipoutput amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5308/ AD5318/AD5328 use a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.The references for the eight DACs are derived from two reference pins (one per DAC quad). These reference inputs can be configured as buffered, unbuffered, or VDD inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. The outputs of all DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 400 nA at 5 V (120 nA at 3 V). The eight channels of the DAC may be powered down individually.All three parts are offered in the same pinout, which allows users to select the resolution appropriate for their application without redesigning their circuit board.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Optical networking Automatic test equipment Mobile communications Programmable attenuators Industrial process control

The AD5303 / AD5313 / AD5323 are dual 8-/10-/12-bit buffered voltage output DACs in a 16-lead TSSOP package that operate from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5313 / AD5323 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards The references for the two DACs are derived from two reference pins (one per DAC). These reference inputs may be configured as buffered or unbuffered inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. There is also an asynchronous active low CLR pin that clears both DACs to 0 V. The outputs of both DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 200 nA at 5 V (50 nA at 3 V) and provides software-selectable output loads while in power-down mode. The parts may also be used in daisy-chaining applications using the SDO pin.The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 1.5 mW at 5 V and 0.7 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5303 / AD5313 / AD5323 are dual 8-/10-/12-bit buffered voltage output DACs in a 16-lead TSSOP package that operate from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5313 / AD5323 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards The references for the two DACs are derived from two reference pins (one per DAC). These reference inputs may be configured as buffered or unbuffered inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. There is also an asynchronous active low CLR pin that clears both DACs to 0 V. The outputs of both DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 200 nA at 5 V (50 nA at 3 V) and provides software-selectable output loads while in power-down mode. The parts may also be used in daisy-chaining applications using the SDO pin.The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is 1.5 mW at 5 V and 0.7 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5337 / AD5338 / AD5339 are dual 8-, 10-, and 12-bit buffered voltage output DACs, respectively. Each part is housed in an 8-lead MSOP package and operates from a single 2.5 V to 5.5 V supply, consuming 250 μA at 3 V. On-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface operates at clock rates up to 400 kHz. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus.The references for the two DACs are derived from one reference pin. The outputs of all DACs can be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit to ensure that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. A software clear function resets all input and DAC registers to 0 V. A power-down feature reduces the current consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is typically 1.5 mW at 5 V and 0.75 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process control

The AD5337 / AD5338 / AD5339 are dual 8-, 10-, and 12-bit buffered voltage output DACs, respectively. Each part is housed in an 8-lead MSOP package and operates from a single 2.5 V to 5.5 V supply, consuming 250 μA at 3 V. On-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface operates at clock rates up to 400 kHz. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus.The references for the two DACs are derived from one reference pin. The outputs of all DACs can be updated simultaneously using the software LDAC function. The parts incorporate a power-on reset circuit to ensure that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. A software clear function resets all input and DAC registers to 0 V. A power-down feature reduces the current consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).The low power consumption of these parts in normal operation makes them ideally suited to portable battery-operated equipment. The power consumption is typically 1.5 mW at 5 V and 0.75 mW at 3 V, reducing to 1 μW in power-down mode.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators Industrial process control

The AD5372 / AD5373 contain 32, 16-bit or 14-bit digital-to-analog converters (DACs) in a single 64-lead LQFP. The devices provide buffered voltage outputs with a nominal span of 4× the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into four groups of eight DACs. Two offset DACs allow the output range of the groups to be altered. Group 0 can be adjusted by Offset DAC 0, and Group 1 to Group 3 can be adjusted by Offset DAC 1.The AD5372 / AD5373 offer guaranteed operation over a wide supply range: VSS from −16.5 V to −4.5 V and VDD from 9 V to 16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The ADAD5372 / AD5373 have a high-speed serial inter- face, which is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds of up to 50 MHz.The DAC registers are updated on reception of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.Each DAC output is gained and buffered on-chip with respect to an external SIGGNDx input. The DAC outputs can also be switched to SIGGNDx via the CLR pin.APPLICATIONS Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation