The ADV7800 is a high quality, single-chip, multiformat 3D comb filter, video decoder, and graphics digitizer. This multiformat 3D comb filter decoder supports the conversion of PAL, NTSC, and SECAM standards in the form of a composite or an S-Video into a digital ITU-R BT.656 format. The ADV7800 also supports the decoding of a component RGB/YPbPr video signal into a digital YCrCb or RGB pixel output stream.The support for component video includes standards such as 525i, 625i, 525p, 625p, 720p, 1080i, 1080p, and many other HD and SMPTE standards. Graphics digitization is supported by the ADV7800; it is capable of digitizing RGB graphics signals from VGA to SXGA rates and converting them into a digital RGB or YCrCb pixel output stream. SCART and overlay functionality are enabled by the ability of the ADV7800 to simultaneously process CVBS and standard definition RGB signals.The ADV7800 contains two main processing sections. The first section is the standard definition processor (SDP), which processes all PAL, NTSC, SECAM, and component (up to 525p/625p) signal types. The second section is the component processor (CP), which processes YPrPb and RGB component formats, including RGB graphics.APPLICATIONS AV receiver LCD HDTVs PDP HDTVs CRT HDTVs HDTV STBs with PVR DVD recorders with progressive scan input support

The ADXL103 is a high precision, low power, complete single-axis accelerometer with signal conditioned voltage outputs, all on a single, monolithic IC. The ADXL103 measures acceleration with a full-scale range of ±1.7 g, ±5 g, or ±18 g. The ADXL103 can measure both dynamic acceleration (for example, vibration) and static acceleration (for example, gravity).The typical noise floor is 110 μg/√Hz, allowing signals below 1 mg (0.06° of inclination) to be resolved in tilt sensing applications using narrow bandwidths (<60 Hz). The user selects the bandwidth of the accelerometer using Capacitor CX and Capacitor CY at the XOUT and YOUT pins. Bandwidths of 0.5 Hz to 2.5 kHz can be selected to suit the application.The ADXL103 is available in a 5 mm × 5 mm × 2 mm, 8-terminal ceramic LCC package.Applications: Platform stabilization/leveling Navigation Alarms and motion detectors High accuracy, 2-axis tilt sensing Vibration monitoring and compensation Abuse event detection

The ADXL203 is a high precision, low power, complete dual-axis accelerometer with signal conditioned voltage outputs, all on a single, monolithic IC. The ADXL203 measures acceleration with a full-scale range of ±1.7 g, ±5 g, or ±18 g. The ADXL203 can measure both dynamic acceleration (for example, vibration) and static acceleration (for example, gravity).The typical noise floor is 110 μg/√Hz, allowing signals below 1 mg (0.06° of inclination) to be resolved in tilt sensing applications using narrow bandwidths (<60 Hz). The user selects the bandwidth of the accelerometer using Capacitor CX and Capacitor CY at the XOUT and YOUT pins. Bandwidths of 0.5 Hz to 2.5 kHz can be selected to suit the application.The ADXL203 is available in a 5 mm × 5 mm × 2 mm, 8-terminal ceramic LCC package.Applications: Platform stabilization/leveling Navigation Alarms and motion detectors High accuracy, 2-axis tilt sensing Vibration monitoring and compensation Abuse event detection

The ADXL320 is a low cost, low power, complete dual-axis accelerometer with signal conditioned voltage outputs, which is all on a single monolithic IC. The product measures acceleration with a full-scale range of ±5g (typical). It can also measure both dynamic acceleration (vibration) and static acceleration (gravity)The ADXL320’s typical noise floor is 250 µg/√Hz, allowing signals below 2 mg to be resolved in tilt-sensing applications using narrow bandwidths (<60 Hz).The user selects the bandwidth of the accelerometer using capacitors CX and CY at the XOUT and YOUT pins. Bandwidths of 0.5 Hz to 2.5 kHz may be selected to suit the application.The ADXL320 is available in a very thin 4 mm × 4 mm × 1.45 mm, 16-lead, plastic LFCSPBENEFITS Two axis accelerometer in small (4mm x 4mm x 1.45mm) LFCSP package allows adding inertial sensing in space-critical handheld devices Low power and wide supply voltage range (2.4V to 5.25V) for battery powered applications Innovative circuit design provides sensitivity, zero-g bias stability over temperature - eliminates need for external compensationAPPLICATIONS Cost-sensitive motion- and tilt-sensing applications Smart hand-held devices Mobile phones Sports and health-related devices PC security and PC peripherals

The DAC8412 / DAC8413 are quad, 12-bit voltage output DACs with readback capability. Built using a complementary BiCMOS process, these monolithic DACs offer the user very high package density.Output voltage swing is set by the two reference inputs VREFH and VREFL. By setting the VREFL input to 0 V and VREFH to a positive voltage, the DAC provides a unipolar positive output range. A similar configuration with VREFH at 0 V and VREFL at a negative voltage provides a unipolar negative output range. Bipolar outputs are configured by connecting both VREFH and VREFL to nonzero voltages. This method of setting output voltage range has advantages over other bipolar offsetting methods because it is not dependent on internal and external resistors with different temperature coefficients.Digital controls allow the user to load or read back data from any DAC, load any DAC, and transfer data to all DACs at one time.An active low RESET loads all DAC output registers to midscale for the DAC8412 and zero scale for the DAC8413.The DAC8412 / DAC8413 are available in 28-lead plastic DIP, 28-lead ceramic DIP, 28-lead PLCC, and 28-lead LCC packages.They can be operated from a wide variety of supply and reference voltages with supplies ranging from single +5 V to ±15 V, and references from +2.5 V to ±10 V. Power dissipation is less than 330 mW with ±15 V supplies and only 60 mW with a +5 V supply.For MIL-STD-883 applications, contact your local Analog Devices, Inc. sales office for the DAC8412/DAC8413/883 data sheet, which specifies operation over the −55°C to +125°C temperature range. All 883 parts are also available on Standard Military Drawings 5962-91 76401MXA through 76404M3A.APPLICATIONS Automatic test equipment Digitally controlled calibration Servo controls Process control equipment

The DAC8420 is a quad, 12-bit voltage-output DAC with serial digital interface in a 16-lead package. Utilizing BiCMOS technology, this monolithic device features unusually high circuit density and lowpower consumption. The simple, easy-to-use serial digital input and fully buffered analog voltage outputs require no external components to achieve a specified performance.The 3-wire serial digital input is easily interfaced to micro-processors running at 10 MHz with minimal additional circuitry. Each DAC is addressed individually by a 16-bit serial word consisting of a 12-bit data word and an address header. The user-programmable reset control CLR forces all four DAC outputs to either zero scale or midscale, asynchronously overriding the current DAC register values. The output voltage range, determined by the inputs VREFHI and VREFLO, is set by the user for positive or negative unipolar or bipolar signal swings within the supplies, allowing considerable design flexibility.The DAC8420 is available in 16-lead PDIP, SOIC, and CERDIP packages. Operation is specified with supplies ranging from +5 V only to ±15 V, with references of +2.5 V to ±10 V, respectively. Power dissipation when operating from ±15 V supplies is less than 255 mW (maximum) and only 35 mW (maximum) with a +5 V supply.Applications Software controlled calibration Servo controls Process control and automation ATE

The AD2S1205 is a complete 12-bit resolution tracking resolver-to-digital converter that contains an on-board programmable sinusoidal oscillator providing sine wave excitation for resolvers.The converter accepts 3.15 VP-P ± 27% input signals on the Sin and Cos inputs. A Type II tracking loop is employed to track the inputs and convert the input Sin and Cos information into a digital representation of the input angle and velocity. The maximum tracking rate is a function of the external clock frequency. The performance of the AD2S105 is specified across a frequency range of 8.192 MHz ± 25%, allowing a maximum tracking rate of 1250 rps.PRODUCT HIGHLIGHTS Ratiometric Tracking Conversion. The Type II tracking loop provides continuous output position data without conversion delay. It also provides noise immunity and tolerance of harmonic distortion on the reference and input signals. System Fault Detection. A fault detection circuit can sense loss of resolver signals, out-of-range input signals, input signal mismatch, or loss of position tracking. Input Signal Range. The Sin and Cos inputs can accept differential input voltages of 3.15 VP-P ± 27%. Programmable Excitation Frequency. Excitation frequency is easily programmable to 10 kHz, 12 kHz, 15 kHz, or 20 kHz by using the frequency select pins (the FS1 and FS2 pins). Triple Format Position Data. Absolute 12-bit angular position data is accessed via either a 12-bit parallel port or a 3-wire serial interface. Incremental encoder emulation is in standard A-quad-B format with direction output available. Digital Velocity Output. 12-bit signed digital velocity accessed via either a 12-bit parallel port or a 3-wire serial interface. APPLICATIONS Automotive motion sensing and control Hybrid-electric vehicles Electric power steering Integrated starter generator/alternator Industrial motor control Process control

The AD7682/AD7689 are 4-channel/8-channel, 16-bit, chargeredistribution successive approximation register (SAR) analog-to-digitalconverters (ADCs) that operate from a single powersupply, VDD.The AD7682/AD7689 contain all components for use in a multichannel, low power data acquisition system, including a true 16-bit SAR ADC with no missing codes; a 4-channel (AD7682) or 8-channel (AD7689) low crosstalk multiplexer that is useful for configuring the inputs as single-ended (with or without ground sense), differential, or bipolar; an internal low drift reference (selectable 2.5 V or 4.096 V) and buffer; a temperature sensor; a selectable one-pole filter; and a sequencer that is useful when channels are continuously scanned in order.The AD7682/AD7689 use a simple serial port interface (SPI) for writing to the configuration register and receiving conversion results. The SPI interface uses a separate supply, VIO, which is set to the host logic level. Power dissipation scales with throughput.The AD7682/AD7689 are housed in a tiny 20-lead lead frame chip scale package (LFCSP) and 20-lead wafer level chip scale package (WLCSP) with operation specified from −40°C to +85°C. The AD7689 includes an extended temperature range model with specifications guaranteed to a maximum temperature (TMAX) of +125°C.Applications Multichannel system monitoring Battery-powered equipment Medical instruments: ECG/EKG Mobile communications: GPS Power line monitoring Data acquisition Seismic data acquisition systems Instrumentation Process control

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of <1 ppm. This frequency-agile PLL allows the ADF7021 to be used in frequency hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from −16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (100 kHz), minimizing power consumption and the external component count while avoiding interference problems at low frequencies. The IF filter has programmable bandwidths of 12.5 kHz, 18.75 kHz, and 25 kHz. The ADF7021 supports a wide variety of programmable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, and the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ±10°C over the full operating temperature range of −40°C to +85°C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of <1 ppm. This frequency-agile PLL allows the ADF7021 to be used in frequency hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from −16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (100 kHz), minimizing power consumption and the external component count while avoiding interference problems at low frequencies. The IF filter has programmable bandwidths of 12.5 kHz, 18.75 kHz, and 25 kHz. The ADF7021 supports a wide variety of programmable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, and the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ±10°C over the full operating temperature range of −40°C to +85°C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.