The AD632 is an internally trimmed monolithic four-quadrant multiplier/divider. The AD632B has a maximum multiplying error of ±0.5% without external trims.Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse conditions. The simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control functions.The AD632 is pin-for-pin compatible with the industry standard AD532 with improved specifications and a fully differential high impedance Z-input. The AD632 is capable of providing gains of up to X10, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD632 can be effectively employed as a variable gain differential inputamplifier with high common-mode rejection. The effectiveness of the variable gain capability is enhanced by the inherent low noise of the AD632: 90 µV rms.APPLICATIONS High quality analog signal processing Differential ratio and percentage computations Algebraic and trigonometric function synthesis Accurate voltage controlled oscillators and filtersPRODUCT HIGHLIGHTS Guaranteed performance over temperature. The AD632A and AD632B are specified for maximum multiplying errors of ±1.0% and ±0.5% of full scale, respectively, at +25°C and are rated for operation from −25°C to +85°C. Maximum multiplying errors of ±2.0% (AD632S) and ±1.0% (AD632T) are guaranteed over the extended temperature range of −55°C to +125°C. High reliability. The AD632S and AD632T series are available with MIL-STD-883 Level B screening. All devices are available in either the hermetically sealed TO-100 metal can or ceramic DIP package.

The AD648 is a matched pair of low power, precision monolithic operational amplifiers. It offers both low bias current (10 pA max, warmed up) and low quiescent current (400 µA max) and is fabricated with ion-implanted FET and laser wafer trimming technologies. Input bias current is guaranteed over the AD648's entire common-mode voltage range.The economical J grade has a maximum guaranteed offset voltage of less than 2 mV and an offset voltage drift of less than 20 µV/°C. The combination of low quiescent current and low offset voltage drift minimizes changes in input offset voltage due to self-heating effects. The AD648 is recommended for any dual supply op amp application requiring low power and excellent dc and ac performance. In applications such as battery-powered, precision instrument front ends and CMOS DAC buffers, the AD648's excellent combination of low input offset voltage and drift, low bias current and low 1/f noise reduces output errors. High common-mode rejection and high open-loop gain ensures better than 12-bit linearity in high impedance, buffer applications.The AD648 is pinned out in a standard dual op amp configuration and is available in seven performance grades. The AD648J and AD648K are rated over the commercial temperature range of 0°C to +70°C. The AD648 is available in an 8-pin plastic mini-DIP and SOIC package.

The AD660 DACPORT® is a complete 16-bit monolithic digital-to-analog converter with an on-board voltage reference, double-buffered latches, and an output amplifier. It is manufactured on the Analog Devices, Inc., BiMOS II process. This process allows the fabrication of low power CMOS logic functions on the same chip as high precision bipolar linear circuitry.The AD660 architecture ensures 15-bit monotonicity over time and temperature. Integral and differential nonlinearity is maintained at ±0.003% maximum. The on-chip output amplifier provides a voltage output settling time of 10 μs to within ½ LSB for a full-scale step.The AD660 has an extremely flexible digital interface. Data can be loaded into the AD660 in serial mode or as two 8-bit bytes. This is made possible by two digital input pins that have dual functions. The serial mode input format is pin selectable to be MSB or LSB first. The serial output pin allows the user to daisy-chain several AD660 devices by shifting the data through the input latch into the next DAC, thus minimizing the number of control lines required to SIN, CS and LDAC. The byte mode input format is also flexible in that the high byte or low byte data can be loaded first. The double buffered latch structure eliminates data skew errors and provides for simultaneous updating of DACs in a multiDAC system.The AD660 is available in five grades. AN and BN versions are specified from −40°C to +85°C and are packaged in a 24-lead300 mil plastic DIP. AR and BR versions are also specified from −40°C to +85°C and are packaged in a 24-lead SOIC. The SQ version is packaged in a 24-lead 300 mil CERDIP package and is also available compliant to MIL-STD-883. Refer to the AD660SQ/883B military data sheet for specifications and test conditions.PRODUCT HIGHLIGHTS The AD660 is a complete 16-bit DAC, with a voltage reference, double-buffered latches, and an output amplifier on a single chip. The internal buried Zener reference is laser trimmed to 10.000 V with a ±0.1% maximum error and a temperature drift performance of ±15 ppm/°C. The reference is available for external applications. The output range of the AD660 is pin programmable and can be set to provide a unipolar output range of 0 V to 10 V or a bipolar output range of −10 V to +10 V. No external components are required. The AD660 is both dc and ac specified. DC specifications include ±1 LSB INL and ±1 LSB DNL errors. AC specifications include 0.009% THD + N and 83 dB SNR. The double-buffered latches on the AD660 eliminate data skew errors and allow simultaneous updating of DACs in multiDAC applications. The clear function can asynchronously set the output to 0 V regardless of whether the DAC is in unipolar or bipolar mode. The output amplifier settles within 10 μs to ±½ LSB for a full-scale step and within 2.5 μs for a 1 LSB step over temperature. The output glitch is typically 15 nV-s when a full-scale step is loaded. Data Sheet, Rev. B, 6/08

The AD676 is a multipurpose 16-bit parallel output analog-to-digital converter which utilizes a switched-capacitor/charge redistribution architecture to achieve a 100 kSPS conversion rate (10 µs total conversion time). Overall performance is optimized by digitally correcting internal nonlinearities through on-chip autocalibration.The AD676 circuitry is segmented onto two monolithic chips- a digital control chip fabricated on Analog Devices DSP CMOS process and an analog ADC chip fabricated on our BiMOS II process. Both chips are contained in a single package.The AD676 is specified for ac (or 'dynamic') parameters such as S/(N+D) Ratio, THD and IMD which are important in signal processing applications. In addition, dc parameters are specified which are important in measurement applications.The AD676 operates from +5 V and ±12 V supplies and typically consumes 360 mW during conversion. The digital supply (VDD ) is separated from the analog supplies (VCC , VEE ) for reduced digital crosstalk. An analog ground sense is provided for the analog input. Separate analog and digital grounds are also provided.The AD676 is available in a 28-pin plastic DIP or 28-pin side-brazed ceramic package. A serial-output version, the AD677, is available in a 16-pin 300 mil wide ceramic or plastic package.

The AD698 is a complete, monolithic Linear Variable Differential Transformer (LVDT) signal conditioning subsystem. It is used in conjunction with LVDTs to convert transducer mechanical position to a unipolar or bipolar dc voltage with a high degree of accuracy and repeatability. All circuit functions are included on the chip. With the addition of a few external passive components to set frequency and gain, the AD698 converts the raw LVDT output to a scaled dc signal. The device will operate with half-bridge LVDTs, LVDTs connected in the series opposed configuration (4-wire), and RVDTs.The AD698 contains a low distortion sine wave oscillator to drive the LVDT primary. Two synchronous demodulation channels of the AD698 are used to detect primary and secondary amplitude. The part divides the output of the secondary by the amplitude of the primary and multiplies by a scale factor. This eliminates scale factor errors due to drift in the amplitude of the primary drive, improving temperature performance and stability.The AD698 uses a unique ratiometric architecture to eliminate several of the disadvantages associated with traditional approaches to LVDT interfacing. The benefits of this new circuit are: no adjustments are necessary; temperature stability is improved; and transducer interchangeability is improved.The AD698 is available in two performance grades: Grade Temperature Range Package AD698AP –40°C to +85°C 28-Pin PLCC AD698SQ –55°C to +125°C 24-Pin Cerdip

The AD7233 is a complete 12-bit, voltage-output, digital-to-analog converter with output amplifier and Zener voltage reference all in an 8-pin package. No external trims are required to achieve full specified performance. The data format is 2s complement, and the output range is -5V to +5V.The AD7233 features a fast, versatile serial interface which allows easy connection to both microcomputers and 16-bit digital signal processors with serial ports. When the SYNC input is taken low, data on the SDIN pin is clocked into the input shift register on each falling edge of SCLK. On completion of the 16-bit data transfer, bringing LDAC low updates the DAC latch with the lower 12 bits of data and updates the output. Alternatively, LDAC can be tied permanently low, and in this case the DAC register is automatically updated with the contents of the shift register when all sixteen data bits have been clocked in. The serial data may be applied at rates up to 5 MHz allowing a DAC update rate of 300 kHz.For applications which require greater flexibility and unipolar output ranges with single supply operation, please refer to the AD7243 data sheet.The AD7233 is fabricated on Linear Compatible CMOS (LC2MOS), an advanced, mixed-technology process. It is packaged in an 8-pin DIP package.

The AD7242 / AD7244 is a fast, complete, dual 12-bit/14-bit voltage output D/A converter. It consists of a 12-bit/14-bit DAC, 3 V buried Zener reference, DAC output amplifiers and high speed serial interface logic.Interfacing to both DACs is serial, minimizing pin count and allowing a small package size. Standard control signals allow interfacing to most DSP processors and microcontrollers. Asynchronous control of DAC updating for both DACs is made possible with a separate LDAC input for each DAC.The AD7242 / AD7244 operates from ±5 V power supplies, providing an analog output range of ±3 V. A REF OUT/REF IN function allows the DACs to be driven from the on-chip 3 V reference or from an external reference source.The AD7242 / AD7244 is fabricated in Linear Compatible CMOS (LC2MOS), an advanced mixed technology process that combines precision bipolar circuits with low power CMOS logic. Both parts are available in a 24-pin, 0.3-inch wide, plastic or hermetic dual-in-line package (DIP) and in a 28-pin, plastic small outline (SOIC) package. The AD7242 and AD7244 are available in the same pinout to allow easy upgrade from 12-bit to 14-bit performance.PRODUCT HIGHLIGHTS Complete, Dual 12-Bit/14-Bit DACs The AD7242 / AD7244 provides the complete function for generating voltages to 12-bit/14-bit resolution. The part features an on-chip reference, output buffer amplifiers and two 12-bit/14-bit D/A converters. High Speed Serial Interface The AD7242 / AD7244 provides a high speed, easy-to-use, serial interface allowing direct interfacing to DSP processors and microcontrollers. A separate serial port is provided for each DAC. Small Package Size The AD7242 / AD7244 is available in a 24-pin DIP and a 28- pin SOIC package offering considerable space saving over comparable solutions.

The AD7302 is a dual, 8-bit voltage out DAC that operates from a single +2.7 V to +5.5 V supply. Its on-chip precision output buffers allow the DAC outputs to swing rail to rail. The AD7302 has a parallel microprocessor and DSP-compatible interface with high speed registers and double buffered interface logic. Data is loaded to the registers on the rising edge of CS or WR and the A/B pin selects either DAC A or DAC B.Reference selection for AD7302 can be either an internal reference derived from the VDD or an external reference applied at the REFIN pin. Both DACs can be simultaneously updated using the asynchronous LDAC input and can be cleared by using the asynchronous CLR input.The low power consumption of this part makes it ideally suited to portable battery operated equipment. The power consumption is less than 10 mW at 3.3 V, reducing to 3 µW in powerdown mode.The AD7302 is available in a 20-pin plastic dual-in-line package, 20-lead SOIC and a 20-lead TSSOP package.APPLICATIONS Portable Battery Powered Instruments Digital Gain and Offset Adjustment Programmable Voltage and Current Sources Programmable AttenuatorsPRODUCT HIGHLIGHTS Low Power, Single Supply Operation. This part operates from a single +2.7 V to +5.5 V supply and typically consumes 15 mW at 5 V, making it ideal for battery powered applications. The on-chip output buffer amplifiers allow the outputs of the DACs to swing rail to rail with a settling time of typically 1.2 µs. Internal or external reference capability. High speed parallel interface. Power-Down Capability. When powered down the DAC consumes less than 1 µA at 25°C. Packaged in 20-lead DIP, SOIC and TSSOP packages.

The AD7303 is a dual, 8-bit voltage out DAC that operates from a single +2.7 V to +5.5 V supply. Its on-chip precision output buffers allow the DAC outputs to swing rail to rail. This device uses a versatile 3-wire serial interface that operates at clock rates up to 30 MHz, and is compatible with QSPI, SPI, microwire and digital signal processor interface standards. The serial input register is sixteen bits wide; 8 bits act as data bits for the DACs, and the remaining eight bits make up a control register.The on-chip control register is used to address the relevant DAC, to power down the complete device or an individual DAC, to select internal or external reference and to provide a synchronous loading facility for simultaneous update of the DAC outputs with a software LDAC function.The low power consumption of this part makes it ideally suited to portable battery operated equipment. The power consumption is 7.5 mW max at 3 V, reducing to less than 3 µW in full power-down mode.The AD7303 is available in an 8-pin plastic dual in-line package, 8-lead SOIC and microSOIC packages.

The AD7470/AD7472 are 10-bit /12-bit high speed, low power, successive-approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.5 MSPS for the 12-bit AD7472 and up to 1.75 MSPS for the 10-bit AD7470. The parts contain a low-noise, wide bandwidth track/hold amplifier which can handleinput frequencies in excess of 20 MHz.The conversion process and data acquisition are controlledusing standard control inputs, allowing easy interfacing tomicroprocessors or DSPs. The input signal is sampled on thefalling edge of CONVST, and conversion is also initiated atthis point. BUSY goes high at the start of conversion andgoes low 531.66 ns after falling edge of CONVST (AD7472with a clock frequency of 26 MHz) to indicate that the conversionis complete. There are no pipeline delays associatedwith the parts. The conversion result is accessed via standardCS and RD signals over a high speed parallel interface.The AD7470/AD7472 use advanced design techniques toachieve very low power dissipation at high throughput rates. With3 V supplies and 1.5 MSPS throughput rates, the AD7470typically consumes, on average, just 1.1 mA. With 5 V suppliesand 1.75 MSPS, the average current consumption is typically1.6 mA. The part also offers flexible power/throughput ratemanagement. Operating the AD7470 with 3 V supplies and500 kSPS throughput reduces the current consumption to 713 μA.At 5 V supplies and 500 kSPS, the part consumes 944 μA.It is also possible to operate the parts in an auto sleep mode,where the part wakes up to do a conversion and automaticallyenters sleep mode at the end of conversion. This method allowsvery low power dissipation numbers at lower throughput rates.In this mode, the AD7472 can be operated with 3 V supplies at100 kSPS, and consume an average current of just 124 μA. At5 V supplies and 100 kSPS, the average current consumption is171 μA.The analog input range for the part is 0 V to REF IN. The 2.5 Vreference is applied externally to the REF IN pin. The conversionrate is determined by the externally-applied clock.ol { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:25px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;}li { padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;}Product HighlightsHigh Throughput with Low Power Consumption. TheAD7470 offers 1.75 MSPS throughput and the AD7472offers 1.5 MSPS throughput rates with 4 mW powerconsumption.Flexible Power/Throughput Rate Management. The conversionrate is determined by an externally-applied clock allowingthe power to be reduced as the conversion rate is reduced.The part also features an auto sleep mode to maximize powerefficiency at lower throughput rates.No Pipeline Delay. The part features a standard successiveapproximation ADC with accurate control of the samplinginstant via a CONVST input and once off conversion control.