14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter Features: 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR = 71.7 dBc (72.7 dBFS) to 70 MHz input SFDR = 85 dBc to 70 MHz input Low power: 395 mW @ 125 MSPS Differential input with 650 MHz bandwidth On-chip voltage reference and sample-and-hold amplifier DNL = ±0.4 LSB Flexible analog input: 1 V p-p to 2 V p-p range Offset binary, Gray code, or twos complement data format Data output clock and clock duty cycle stabilizer Serial port control Built-in selectable digital test pattern generation Programmable clock and data alignment

Octal LNA/VGA/AAF/ADC and Crosspoint Switch Features: 8 channels of LNA, VGA, AAF, and ADC Low noise preamplifier (LNA) - See data sheet for additional information Variable gain amplifier (VGA) - See data sheet for additional information Antialiasing filter (AAF) - See data sheet for additional information Analog-to-digital converter (ADC) - See data sheet for additional information Includes an 8 × 8 differential crosspoint switch to support continuous wave (CW) Doppler Low power, 195 mW per channel at 12 bits/40 MSPS (TGC) See data sheet for additional features

8-Bit, 50 MSPS/80 MSPS/100 MSPS ADC Features: Low Power: 90 mW at 100 MSPS On-Chip Reference and Track/Hold 475 MHz Analog Bandwidth 46.5 dB SNR at 100 MSPS with 41 MHz input 1 Vp-p Analog Input Range Single +3.0 V Supply Operation (2.7 -3.6 V) Power Down Mode: 4.2 mW

Ethernet/Gigabit Ethernet Clock Generator Features: Redundant input reference clock capability Reference monitoring function Fully integrated VCO/PLL core Jitter (rms) 0.234 ps rms jitter (10 kHz to 10 MHz) at 156.25 MHz 0.243 ps rms jitter (12 kHz to 20 MHz) at 156.25 MHz Input frequency: 19.44 MHz or 25 MHz Preset frequency translations Using a 19.44 MHz input reference 19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz Using a 25 MHz input reference 25 MHz, 33.33 MHz, 50 MHz, 66.67 MHz, 80 MHz, 100 MHz, 125 MHz, 133.3 MHz, 156.25 MHz, 160 MHz, 312.5 MHz Output drive formats: HSTL, LVDS, HCSL, and 1.8 V and 3.3 V CMOS Integrated loop filter (requires a single external capacitor) 2 copies of reference clock output Device configuration via strapping pins (PPRx) Space-saving 7 mm × 7 mm 48-lead LFCSP 3.3 V operation

16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) Features: 1.8 V analog supply operation 1.8 V CMOS or LVDS output supply SNR 82 dBFS at 30 MHz input and 105 MSPS data rate 83 dBFS at 9.7 MHz input and 25 MSPS data rate SFDR 90 dBc at 30 MHz input and 105 MSPS data rate 95 dBc at 9.7 MHz input and 25 MSPS data rate Low power 328 mW per channel at 105 MSPS 119 mW per channel at 25 MSPS Integer 1-to-8 input clock divider See data sheet for additional featuresAD9650-EP supports defense and aerospace applications (AQEC standard) Download AD9650-EP data sheet (pdf)

anyCAP 100 mA Low Dropout Linear Regulator Features:1.2% accuracy over line and load regulations @ 25C Ultralow dropout voltage: 120 mV typical @ 100 mA Requires only COUT = 0.47 F for stability anyCAP LDOs are stable with all types of capacitors (including MLCC) Current and thermal limiting Low noise Low shutdown current: 1 A 2.8 V to 12 V supply range 20C to +85C ambient temperature range Several fixed voltage options Ultrasmall 5-lead SOT-23 package Excellent line and load regulations

High Accuracy Ultralow IQ, 300 mA, anyCAP Low Dropout Regulator Features:High Accuracy over line and load: 0.8% @ 25C, 1.8% over temperatureUltralow dropout voltage: 230 mV (Max) @ 300 mARequires only COUT = 1.0 F for stabilityanyCAP is stable with any type of capacitor (including MLCC)Current and thermal limitingLow noiseLow shutdown current: 2.6 V to 12 V supply range40C to +85C ambient temperature rangeUltrasmall 8-Lead MSOP package

High Accuracy Ultralow IQ, 300 mA, anyCAP Low Dropout Regulator Features:High Accuracy over line and load: 0.8% @ 25C, 1.8% over temperatureUltralow dropout voltage: 230 mV (Max) @ 300 mARequires only COUT = 1.0 F for stabilityanyCAP is stable with any type of capacitor (including MLCC)Current and thermal limitingLow noiseLow shutdown current: 2.6 V to 12 V supply range40C to +85C ambient temperature rangeUltrasmall 8-Lead MSOP package

2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs Features: Wide input supply voltage range: 2.85 V to 15 V Generates well regulated, independently resistor programmable VPOS and VNEG outputs Boost regulator to generate VPOS output Adjustable positive output to 39 V Integrated 2.0 A main switch Optional single-ended primary-inductor converter (SEPIC) configuration for automatic step-up/step-down Inverting regulator to generate VNEG output Adjustable negative output to VIN − 39 V Integrated 1.2 A main switch True shutdown for both positive and negative outputs 1.2 MHz/2.4 MHz switching frequency with optional external frequency synchronization from 1.0 MHz to 2.6 MHz Resistor programmable soft start timer Slew rate control for lower system noise Individual precision enable and flexible start-up sequence control for symmetric start, VPOS first, or VNEG first Out-of-phase operation UVLO, OCP, OVP, and TSD protection 4 mm × 4 mm, 20-lead LFCSP and 20-lead TSSOP −40°C to +125°C junction temperature range Supported by the ADIsimPower tool set

20 V, 500 mA, Low Noise LDO Regulator with Soft Start Features: Input voltage range: 3.3 V to 20 V Maximum output current: 500 mA Low noise: 15 μV rms for fixed output versions PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V Reverse current protection Low dropout voltage: 350 mV at 500 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature −2% to +1%, TJ = −40°C to +125°C −1.25% to +1%, TJ = 0°C to +85°C Low quiescent current: 900 μA at VIN = 10 V, IOUT = 500 mA Low shutdown current: <50 μA at VIN = 12 V, stable with small 1 μF ceramic output capacitor 3 fixed output voltage options: 1.8, 3.3 V and 5 V Adjustable output from 1.22 V to 19 V Programmable soft start for inrush current control Foldback current-limit and thermal overload protection User programmable precision UVLO/enable Power-good indicator 8-lead LFCSP and 8-lead SOIC packages