Digital Controller for Power Supply Applications with PMBus Interface Features: −40°C to +125°C operation with EEPROM data retention of 15 years at 125°C PMBus Revision 1.2 compliant 32-bit password protection with command masking 64 address selections (16 base addresses, expandable to 64) 6 PWM control signals, 625 ps resolution Duty cycle double update rate Digital control loop (PID + additional pole or zero configurability) Programmable loop filters (CCM, DCM, low/normal temperature) Frequency synchronization Soft start and soft stop functionality Average and peak constant current mode External PN junction temperature sensing 4 GPIOs (2 GPIOs configurable as active clamp snubber PWMs) Fast line voltage feedforward Adaptive dead time compensation for improved efficiency Extended black box data recorder for fault recording See datasheet for additional features

Isolated Synchronous Flyback Controller with Integrated iCoupler Features: Current mode controller for flyback topology ADP1071-1: programmable LLM or CCM for high VIN applications ADP1071-2: forced CCM operation Programmable slope compensation Integrated 5 kV isolation (wide body SOIC package) or 3.0 kV (LGA package) rated dielectric isolation voltage with Analog Devices, Inc., patented iCoupler technology Wide voltage supply range Primary VDD: up to 60 V (ADP1071-2 only) Secondary VDD2: up to 36 V Integrated 1 A primary side MOSFET driver Integrated 1 A secondary side MOSFET drivers for synchronous rectification Integrated error amplifier and <1% accurate reference voltage Programmable frequency range: 50 kHz to 600 kHz Duty cycle clamp limit 85% Programmable soft start and soft start from precharged load Protection features such as short circuit, output overvoltage, and overtemperature protection Power saving LLM using MODE pin (ADP1071-1only) Cycle by cycle input overcurrent protection Precision enable UVLO with hysteresis Frequency synchronization Safety and regulatory approvals (pending) UL recognition 5000 V rms for 1 minute per UL 1577 (for wide body SOIC package) 3000 V rms for 1 minute per UL 1577 (for LGA package) CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 849 V peak (for wide body SOIC package) VIORM = 565 V peak (for LGA package) CQC certification per GB4943.1-2011 Available in 16-lead SOIC_W package and 24 terminal LGA package

Isolated, Synchronous Forward Controller with Active Clamp and iCoupler Features: Current mode controller for active clamp forward topology Integrated 5 kV (wide body SOIC package) or 3.0 kV (LGA package) rated dielectric isolation voltage with Analog Devices, Inc., patented iCoupler technology Wide voltage supply range Primary VIN: up to 60 V Secondary VDD2: up to 36 V Integrated 1 A primary side MOSFET driver for power switch and active clamp reset switch Integrated 1 A secondary side MOSFET drivers for synchronous rectification Integrated error amplifier and <1% accurate reference voltage Programmable slope compensation Programmable frequency range: 50 kHz to 600 kHz typical Frequency synchronization Programmable maximum duty cycle limit Programmable soft start Smooth soft start from precharged load Programmable dead time Power saving light load mode using MODE pin Protection features such as short circuit, output overvoltage, and overtemperature protection Cycle-by-cycle input overcurrent protection Precision enable UVLO with hysteresis PGOOD pin for system flagging Tracking function from secondary side Remote (secondary side) shutdown/reset function Safety and regulatory approvals (pending) UL recognition 5000 V rms for 1 minute per UL 1577 (for wide body SOIC package) 3000 V rms for 1 minute per UL 1577 (for LGA package) CSA component acceptance notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 849 V peak (for wide body SOIC package) VIORM = 560 V peak (for LGA package) CQC certification per GB4943.1-2011 Available in 24-lead SOIC_W package and 24-terminal LGA package AEC-Q100 Qualified for Automotive Applications

Ultralow Noise, 150 mA CMOS Linear Regulator Features: Chinese data sheet available Ultralow noise: 9 μV rms, independent of VOUT No additional noise bypass capacitor required Stable with 1 μF ceramic input and output capacitors Maximum output current: 150 mA Input voltage range: 2.2 V to 5.5 V Low quiescent current IGND = 10 μA with zero load Low shutdown current: <1 μA Low dropout voltage: 105 mV at 150 mA load Initial output voltage accuracy: ±1% Up to 14 fixed output voltage options: 1.8 V to 3.3 V PSRR performance of 70 dB at 10 kHz Current limit and thermal overload protection Logic-controlled enable 5-lead TSOT package 4-ball, 0.8 mm × 0.8 mm, 0.4 mm pitch WLCSP AEC-Q100 qualified for automotive applications

150 mA, Low Dropout, CMOS Linear Regulator Features: Maximum output current: 150 mA Input voltage range: 2.5 V to 5.5 V Light load efficient IGND = 35 μA with zero load IGND = 40 μA with 100 μA load Low shutdown current: <1 μA Low dropout voltage: 150 mV @ 150 mA load Initial accuracy: ±1% Accuracy over line, load, and temperature: ±2% Stable with small 1 μF ceramic output capacitor 16 fixed output voltage options: 0.75 V to 3.3 V (ADP1710) Adjustable output voltage option: 0.8 V to 5.0 V (ADP1710 Adjustable) 16 fixed output voltage options with reference bypass: 0.75 V to 3.3 V (ADP1711) High PSRR: 69 dB @ 1 kHz

300 mA, Low Dropout CMOS Linear Regulator Features: Maximum output current: 300 mA Input voltage range: 2.5 V to 5.5 V Light load efficient IGND = 75 μA with 100 μA load Low shutdown current: <1 μA Very low dropout voltage: 170 mV @ 300 mA load Initial accuracy: ±1% Accuracy over line, load, and temperature: ±2% 16 fixed output voltage options with tracking: 0.75 V to 3.3 V Low output noise: 40 μV rms High PSRR: 72 dB @ 1 kHz Stable with small 2.2 μF ceramic output capacitor See data sheet for additional features

GaAs MMIC SPDT Switch SMT, DC - 3 GHz Features: Low Insertion Loss: 0.4dB Ultra Small Package: MSOP8 High Input IP3: +50 dBm Positive Control: 0/+3V @ 0.1 uA

High Voltage, Latch-Up Proof, 16-Channel Multiplexer Features: Latch-up proof 3.5 pF off source capacitance 64 pF off drain capacitance 0.35 pC typical charge injection ±0.02 nA on channel leakage Low on resistance: 155 typical ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation VSS to VDD analog signal range Human body model (HBM) ESD rating - 8 kV all other pins

Dual Channel, 16-Bit, 16 MUPS, Multispan, Multi-IO SPI DAC Features: 16-bit resolution 16 MUPS single channel rate in fast mode 11 MUPS single channel rate in precision mode 78 ns small signal settling time to 0.1% accuracy 100 ns large signal settling time to 0.1% accuracy Ultrasmall glitch: <50 pV×s Ultralow latency: 5 ns THD: −105 dB at 1 kHz Highly configurable output voltage span and offset 1.2 V and 1.8 V logic level compatible Single (classic) and dual SPI modes Multiple error detectors, both analog and digital domains 2.5 V internal voltage reference, 10 ppm/°C maximum temperature coefficient Small package: 4 mm × 4 mm LFCSP

Dual Channel, 16-Bit, 33 MUPS, Multispan, Multi-IO SPI DAC Features: 16-bit resolution 33 MUPS single channel rate in fast mode 22 MUPS single channel rate in precision mode 65 ns small signal settling time to 0.1% accuracy 100ns large signal settling time to 0.1% accuracy Ultra small glitch: < 50 pV×s Ultra low latency: 5 ns THD: −105 dB at 1 kHz Highly configurable output voltage span and offset 1.2 V and 1.8 V logic level compatible Single (classic), dual, and quad SPI modes Multiple error detectors, both analog and digital domains 2.5 V internal voltage reference, 10 ppm/°C maximum temperature coefficient 5 mm × 5 mm LFCSP