The AD9847 is a highly integrated CCD signal processor fordigital still camera applications. The AD9847 includes a completeanalog front end with A/D conversion, combined witha programmable timing driver. The Precision Timing core allowsadjustment of high speed clocks with approximately 500 psresolution at clock speeds of 40 MHz.The AD9847 is specified at pixel rates of 40 MHz. The analogfront end includes black level clamping, CDS, PxGA, VGA, and a 10-bit A/D converter. The timing driver provides the high speed CCD clock drivers for RG and H1–H4. Operation is programmedusing a 3-wire serial interface.Packaged in a space-saving 48-lead LQFP, the AD9847 is specifiedover an operating temperature range of –20°C to +85°C.APPLICATIONS Digital Still Cameras

The AD9848 and AD9849 are highly integrated CCD signal processors for digital still camera applications. Both include a complete analog front end with A/D conversion, combined with a programmable timing driver. The Precision Timing core allows adjustment of high speed clocks with approximately 1 ns resolution.The AD9848 is specified at pixel rates of 20 MHz, and theAD9849 is specified at 30 MHz. The analog front end includesblack level clamping, CDS, PxGA, VGA, and a 10-bit or 12-bit A/Dconverter. The timing driver provides the high speed CCD clockdrivers for RG and H1–H4. Operation is programmed using a3-wire serial interface.Packaged in a space saving 48-lead LQFP, the AD9848 andAD9849 are specified over an operating temperature range of–20°C to +85°C.APPLICATIONS Digital Still Cameras

The ADA4941-1 is a low power, low noise differential driver foranalog-to-digital converters (ADCs) up to 18 bits in systemsthat are sensitive to power. The ADA4941-1 is configured in aneasy-to-use, single-ended-to-differential configuration andrequires no external components for a gain of 2 configuration.A resistive feedback network can be added to achieve gains greaterthan 2. The ADA4941-1 provides essential benefits, such as lowdistortion and high SNR that are required for driving highresolution ADCs.With a wide input voltage range (0 V to 3.9 V on a single 5 Vsupply), rail-to-rail output, high input impedance, and a user-adjustablegain, the ADA4941-1 is designed to drive single-supplyADCs with differential inputs found in a variety of low powerapplications, including battery-operated devices and singlesupplydata acquisition systems.The ADA4941-1 is ideal for driving the 16-bit and 18-bitPulSAR® ADCs, such as the AD7687, AD7690, and AD7691.The ADA4941-1 is manufactured on Analog Devices, Inc.,proprietary, second-generation, eXtra fast complementarybipolar (XFCB) process, which enables the amplifier to achieve18-bit performance on low supply currents.The ADA4941-1 is available in a small 8-lead LFCSP as well as astandard 8-lead SOIC and is rated to work over the extendedindustrial temperature range, −40°C to +125°C. Applications Single-supply data acquisition systems Instrumentation Process control Battery-power systems Medical instrumentation

The ADAU1328 is a high performance, single-chip codec that provides two analog-to-digital converters (ADCs) with differential input and eight digital-to-analog converters (DACs) with single-ended output using the Analog Devices, Inc. patented multibit sigma-delta (Σ-Δ) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1328 operates from 3.3 V digital and analog supplies. The ADAU1328 is available in a 48-lead (single-ended output) LQFP. Other members of this family include a differential DAC output version.The ADAU1328 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR clock or from an external crystal, the ADAU1328 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The digital-to-analog and analog-to-digital converters are designed using the latest ADI continuous time architectures to further minimize EMI. By using 3.3 V supplies, power consumption is minimized, further reducing emissions.APPLICATIONS Home theater systems Set-top boxes Digital audio effects processors

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a Σ-Δ-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The ADG1206 and ADG1207 are monolithic iCMOS® analogmultiplexers comprising sixteen single channels and eightdifferential channels, respectively. The ADG1206 switches oneof sixteen inputs to a common output, as determined by the4-bit binary address lines A0, A1, A2, and A3. The ADG1207switches one of eight differential inputs to a common differentialoutput, as determined by the 3-bit binary address lines A0, A1,and A2. An EN input on both devices is used to enable or disablethe device. When disabled, all channels are switched off. Whenon, each channel conducts equally well in both directions andhas an input signal range that extends to the supplies.The industrial CMOS (iCMOS) modular manufacturingprocess combines high voltage complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables thedevelopment of a wide range of high performance analog ICscapable of 33 V operation in a footprint that no other generationof high voltage devices has been able to achieve. Unlike analogICs using conventional CMOS processes, iCMOS componentscan tolerate high supply voltages while providing increasedperformance, dramatically lower power consumption, andreduced package size. The ultralow capacitance and exceptionally low charge injectionof these multiplexers make them ideal solutions for data acquisitionand sample-and-hold applications, where low glitch and fastsettling are required. There is minimumcharge injection over the entire signal range of the device.iCMOS construction also ensures ultralow power dissipation,making the devices ideally suited for portable and battery-poweredinstruments.Applications Audio and video routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Communication systems