18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs Features: Easy Drive Greatly reduced input kickback Input current reduced to 0.5 μA/MSPS Enhanced acquisition phase, ≥79% of cycle time at 1 MSPS First conversion accurate, no latency or pipeline delay Input span compression for single-supply operation Fast conversion allows low SPI clock rates Input overvoltage clamp protection sinks up to 50 mA SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface High performance Pseudo differential analog input range 0 V to VREF with VREF from 2.4 V to 5.1 V Throughput: 2 MSPS/1 MSPS/500 kSPS options INL: ±3.2 LSB maximum Guaranteed 18-bit, no missing codes SNR: 95 dB at fIN = 1 kHz at VREF = 5 V THD: −125 dB at fIN = 1 kHz, −108 dB at fIN = 100 kHz SINAD: 84.5 dB at fIN = 1 MHz (see Figure 17 in data sheet) Oversampled dynamic range 98 dB for OSR = 2 125 dB for OSR = 1024 Low power Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface 2.5 mW at 500 kSPS (VDD only) 70 μW at 10 kSPS, 14 mW at 2 MSPS (total power) 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP Pin compatible with AD4003/AD4007/AD4011 family Guaranteed operation: −40°C to +125°C

Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with 10 V Inputs Features:24-bit ADC with integrated AFEFast and flexible output rate: 2.5 SPS to 125 kSPSChannel scan data rate of 24,845 SPS per channel (40.25 s settling)85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel10 V inputs, either 8 differential or 16 single-endedVIN pin absolute maximum rating 65 VAbsolute input pin voltage up to 20 VMinimum 1 M impedanceOn-chip 2.5 V reference0.12% initial accuracy at 25C, 5 ppm/C (typical) driftInternal or external clockPower suppliesAVDD = 4.5 V to 5.5 VIOVDD = 2 V to 5.5 VTotal current consumption AVDD + IOVDD (IDD) = 10.4 mATemperature range: 40C to +105C3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)SPI, QSPI, MICROWIRE, and DSP compatible

Fully Accurate 12-Bit VOUT nanoDAC SPI Interface 4.5 V to 5.5 V in a TSSOP Features: Low power dual 12-/14-/16-bit DAC, ±1 LSB INL Individual voltage reference pins Rail-to-rail operation 4.5 V to 5.5 V power supply Power-on reset to zero scale or midscale Power down to 400 nA at 5 V 3 power-down functions Per channel power-down Low glitch upon power-up Hardware power-down lockout capability Hardware LDAC with software LDAC override function CLR function to programmable code SDO daisy-chaining option 14-lead TSSOP

4-Channel 200 kSPS, 12-Bit A/D Converter with Sequencer in 16-Lead TSSOP Features: Fast throughput rate: 200 kSPS Specified for AVDD of 2.7 V to 5.25 V Low power 3.6 mW max at 200 kSPS with 3 V supply 7.5 mW max at 200 kSPS with 5 V supply 4 (single-ended) inputs with sequencer Wide input bandwidth 70 dB Min SNR at 50 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface SPI® -/QSPI™-/ MICROWIRE™-/DSP-compatible Shutdown mode: 0.5 μA max 16-lead TSSOP package Qualified for automotive applicationsAD7923-EP supports defense and aerospace applications (AQEC standard) Download AD7923-EP data sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Product change notification Qualification data available on request V62/12647 DSCC Drawing Number

250 kSPS, 12- Bit ADC in 6 Lead SC70 Features: Throughput Rate: 250 kSPS Specified for VDD of 2.35 V to 5.25 V Low Power: 3 mW typ at 250 KSPS with 3 V Supplies 12.5 mW typ at 250 KSPS with 5 V Supplies Wide Input Bandwidth: 70 dB SNR at 100 kHz Input Frequency No Pipeline Delays Flexible Power/Serial Clock Speed Management High Speed Serial Interface SPI®/QSPI™/MICROWIRE™/DSP Compatible Standby Mode: 1 µA max 6-Lead SC70 Package 8-Lead µSOIC Package

OVP and EMI Protected, Precision, Low Noise and Bias Current Single Op Amp Features: Low offset voltage: 60 μV maximum at 25°C (8-lead and 14-lead SOIC) Low offset voltage drift: 1 μV/°C maximum (8-lead and 14-lead SOIC) Low input bias current: 1 nA maximum at 25°C Low voltage noise density: 8 nV/√Hz typical at 1 kHz Large signal voltage gain (AVO): 100 dB minimum over full supply voltage and operating temperature Input overvoltage protection to 32 V above and below the supply voltage rail Integrated EMI filter 70 dB typical rejection at 1000 MHz 90 dB typical rejection at 2400 MHz Rail-to-rail output swing Low supply current: 500 μA typical per amplifier Wide bandwidth Gain bandwidth product (AV = 100): 3.5 MHz typical Unity-gain crossover (AV = 1): 3.5 MHz typical −3 dB bandwidth (AV = 1): 6 MHz typical Dual-supply operation Specified at ±5 V to ±15 V, operates over ±2.5 V to ±18 V Unity-gain stable No phase reversal Long-term offset voltage drift (10,000 hours): 2 μV typical Temperature hysteresis: 2 μV typical

Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Features: Fully specified rail-to-rail at VCC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch TTL-/CMOS-compatible output stage 40 ns propagation delay Low power 1 mW at 2.5 V Shutdown pin Programmable hysteresis Power supply rejection > 60 dB −40°C to +125°C operation

Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Features: Fully specified rail-to-rail at VCC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch TTL-/CMOS-compatible output stage 40 ns propagation delay Low power 1 mW at 2.5 V Shutdown pin Programmable hysteresis Power supply rejection > 60 dB −40°C to +125°C operation

4-Channel, 24 GHz, Receiver Downconverter Features: Integrated baluns for single-ended receiver (Rx) inputs and local oscillator (LO) input Rx channel gain: 22 dB Noise figure (NF): 10 dB P1dB: −10 dBm LO input range: −8 dBm to +5 dBm Rx to IF isolation: 30 dB RF signal bandwidth: 250 MHz Rx output impedance: 900 Ω differential LO input buffer: 24 GHz RF and LO S11 at 50 Ω: −5 dB Temperature sensor with analog output: ±5° Electrostatic discharge (ESD) performance Human body model (HBM): 2000 V Charged device model (CDM): 500 V Qualified for automotive applications

300 mA, Low Dropout CMOS Linear Regulator Features: Maximum output current: 300 mA Input voltage range: 2.5 V to 5.5 V Light load efficient IGND = 75 μA with 100 μA load Low shutdown current: <1 μA Very low dropout voltage: 170 mV @ 300 mA load Initial accuracy: ±1% Accuracy over line, load, and temperature: ±2% 16 fixed output voltage options with tracking: 0.75 V to 3.3 V Low output noise: 40 μV rms High PSRR: 72 dB @ 1 kHz Stable with small 2.2 μF ceramic output capacitor See data sheet for additional features