The ADG772 is a low voltage CMOS device that contains two independently selectable single-pole, double throw (SPDT) switches. It is designed as a general-purpose switch and can be used for routing both USB 1.1 and USB 2.0 signals.This device offers a data rate of 1260 Mbps, making the part suitable for high frequency data switching. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG772 exhibits break-before-make switching action.The ADG772 is available in a 12-lead LFCSP and a 10-lead mini LFCSP. These packages make the ADG772 the ideal solution for space-constrained applications.Product Highlights 1.6 mm ? 1.3 mm mini LFCSP package. USB 1.1 (12 Mbps) and USB 2.0 (480 Mbps) compliant. Single 2.7 V to 3.6 V operation. 1.8 V logic compatible. RoHS compliant. Applications USB 2.0 signal switching circuits Cellular phones PDAs MP3 players Battery-powered systems Headphone switching Audio and video signal routing Communications systems

The ADGM1001/ADGM1002/ADGM1003 is a wideband, single-pole, two-throw (SP2T) switch, fabricated using Analog Devices, Inc., micro-electromechanical system (MEMS) switch technology. This technology enables a small form factor, wide RF bandwidth, highly linear, low insertion loss switch that is operational down to 0 Hz/dc, making it an ideal solution for a wide range of RF and precision equipment switching needs. The device is packaged in a 24-lead, 5.00 mm ? 4.00 mm ? 0.90 mm, land grid array (LGA) package.An integrated control chip generates the high voltage necessary to electrostatically actuate the switch via a complementary metal-oxide semiconductor (CMOS)-/low voltage transistor-transistor logic (LVTTL)-compatible parallel interface. All switches are independently controllable.Multifunction pin names may be referenced by their relevant function only. ADGM1001/ADGM1002/ADGM1003 Key Specifications Model Bandwidth Maximum RF Power (dBm) DC Signal Range (V) Maximum DC Current (mA) ADGM1001 DC to 34 GHz 33 ?6 200 ADGM1002 DC to 20 GHz 30 ?5 150 ADGM1003? DC to 16 GHz 27 ?3 75 APPLICATIONS ATE load and probe boards DC and high speed loop back testing Relay replacements Reconfigurable filters and attenuators Military and microwave radios Cellular infrastructure: 5G mmWave Supports digital standards: PCIe Gen4/Gen5/Gen6, USB 3 and USB 4, and PAM 4

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The ADIN1200 is a low power, single-port, 10 Mbps and 100 Mbps Ethernet transceiver with low latency specifications designedfor industrial Ethernet applications.This design integrates an energy efficient Ethernet (EEE) physical layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and media access control (MAC) interface and control logic to manage the reset, clock control and pin configuration.The ADIN1200 is available in a 5 mm ? 5 mm, 32-lead leadframe chip scale package (LFCSP) and can operate with a single3.3 V supply, assuming the use of a 3.3 V MAC interface supply.For maximum flexibility in system level design, a separate VDDIOsupply enables the management data input/output (MDIO) andMAC interface supply voltages to be configured independentlyof the other circuitry on the ADIN1200 allowing operation at1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1200 is held inhardware reset until each of the supplies has crossed its minimumrising threshold value and the power is considered good. Brownoutprotection is provided by monitoring the supplies to detect ifone or more of them drops below a minimum falling thresholdand holding the device in hardware reset until the power suppliesreturn and satisfy the power-on-reset (POR) circuit.The MII management interface (also referred to as MDIOinterface) provides a 2-wire serial interface between a hostprocessor or MAC and the ADIN1200, allowing access tocontrol and status information in the PHY core managementregisters. The interface is compatible with both IEEE? 802.3?Standard Clause 22 and Clause 45 management framestructures.The ADIN1200 can support cable lengths up to 180 meters.Note that throughout this data sheet, multifunction pins, such as XTAL_I/CLK_IN/REF_CLK, are referred to either by the entire pin name or by a single function of the pin, for example, XTAL_I, when only that function is relevant.Applications Industrial automation Process control Factory automation Robotics and motion Control Building automation Test and Measurement Industrial internet of things (IoT)

The ADIN1300 is a low power, single port, Gigabit Ethernet transceiver with low latency and power consumption specifications primarily designed for industrial Ethernet applications.This design integrates an energy efficient Ethernet (EEE) physical layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and MAC interface and control logic to manage the reset and clock control and pin configuration.The ADIN1300 is available in a 6 mm ? 6 mm, 40-lead lead frame chip scale package (LFCSP). The device operates with a minimum of 2 power supplies, 0.9 V and 3.3 V, assuming the use of a 3.3 V MAC interface supply. For maximum flexibility in system level design, a separate VDDIO supply enables the management data input/output (MDIO) and MAC interface supply voltages to be configured independently of the other circuitry on the ADIN1300, allowing operation at 1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1300 is held in hardware reset until each of the supplies has crossed its minimum rising threshold value. Brown-out protection is provided by monitoring the supplies to detect if one or more supply drops below a minimum falling threshold (see Table 17 on the datasheet), and holding the device in hardware reset until the power supplies return and satisfy the power-on reset (POR) circuit.The MII management interface (also referred to as MDIO interface) provides a 2-wire serial interface between a host processor or MAC (also known as management station (STA)) and the ADIN1300, allowing access to control and status information in the PHY core management registers. The interface is compatible with both the IEEE 802.3 Standard Clause 22 and Clause 45 management frame structures.The ADIN1300 can support cable lengths up to 150 meters at Gigabit speeds and 180 meters when operating at 100 Mbps or 10 Mbps.Applications Industrial automation Process control Factory automation Robotics/Motion Control Building automation Test and Measurement Industrial IoT

The EVAL-ADL5902-ARDZ shield illustrates the functionality of the ADL5902, a 50 MHz to 9 GHz 65 dB TruPwr™ RMS responding RF power detector. The voltage outputs of the ADL5902 are routed to the ANALOG IN connector of the Arduino base board. This allows the RF power detector’s output voltage to be easily digitized and processed by the Arduino base board’s integrated six-channel ADC. The output of the ADL5902’s on-board temperature sensor is also routed to one of the ANALOG IN pins.

The ADM1063 is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1063 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages.The device also provides up to 10 programmable inputs for monitoring under, over, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an n-FET that can be placed in the path of a supply.ApplicationsCentral office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM1066 Super Sequencer? is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple-supply systems. In addition to these functions, the ADM1066 integrates a 12-bit ADC and six 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs. Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter.APPLICATIONS Central office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM1169 Super Sequencer? is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1169 integrates a 12-bit ADC and four 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs. Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter. The device also provides up to eight programmable inputs for monitoring undervoltage faults, overvoltage faults, or out-of-window faults on up to eight supplies. In addition, there are eight programmable outputs that can be used as logic enables. Six of these programmable outputs can also provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. The logical core of the device is a sequencing engine (SE). This state machine-based construction provides up to 63 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs. A block of nonvolatile EEPROM is available that can be used to store user-defined information and may also be used to hold a number of fault records that are written by the sequencing engine defined by the user when a particular fault or sequence occurs. The ADM1169 is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc.